Indian Journal of Science and Technology

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A low-voltage CMOS transconductor is designed in 0.35μm standard CMOS technology. The proposed circuit uses adaptive biasing linearization method to achieve better linearity in low voltage applications. Simulation results using HSPICE show a total harmonic distortion of -71 dB at 1.25 MHz for a 400 mV peak to peak input voltage. The total power consumption is only 45 μW with 1.5 V power supply. The circuit can be used in the implementation of membership functions or fuzzifiers in analogue and mixed-signal neuro-fuzzy systems.

Keywords

Adaptive Biasing, High Linear, Low-voltage, Low-power, Transconductance, Fuzzifier
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