FPGA Implementation of Digital Modulation Technique for HRR Target Detection

In Radar signal processing, at the receiving end signal detection is difficult when the signal is corrupted by noise. Conventional digital signal processing techniques are not capable to detect the corrupted signal in noise. In this paper, different methods for design of Binary Phase Shift Keying (BPSK) modulation are described. The design and simulation of the different blocks such as signed multipliers, Barker code generators, multiplexer etc. Consequential Digital project design is practicable because of advance hardware description languages (eg. verilog or VHDL) and implementation of Field Programmable Gate Array (FPGA). Digital communication is steady and secure than that of analog communication. BPSK is competent and important technique in digital communication. For implementation of software defined radar systems, the resolution, sensibility and extensibility requirements are driving the development of RF signal generator with phase, pulse amplitude and stable frequency carriers verilog hardware description language is used to design entire system and implemented on Sparten-6 FPGA device.