Low Loss 2-Bit Distributed MEMS Phase Shifter using Chamfered Transmission Line

Objectives: The objective of this paper is to design a 2-bit DMTL phase shifter with low insertion loss, improved phase shift per dB loss with minimum number of switches. Methods/Analysis: In order to reduce the insertion loss tapered impedance section proposed previous researchers introduces impedance discontinuity at the end of the taper that introduces a fringing capacitance at the transition region which cannot be neglected while calculating the loaded line capacitance. The proposed chamfered transmission line design for phase shifter overcomes this shortcoming with a uniform high impedance line that does not have any discontinuities and causes variations of propagation constant along the length of the transmission line. The proposed design also reduces the discontinuity effects associated with step width junction and reflection is much reduced. Findings: Chamfering the corners at the contact area of switch with the transmission line reduces the discontinuity effects associated with step width junction. The achieved phase shift is 178.87o at 17GHz with an insertion loss of -0.87dB and return loss in both up, down states less than -15dB. Design and simulation results of the phase shifter with respect to pull-in voltage of the switch, RF characterization is done using Coventorware and HFSS.