Generating of Digital Fuzzifier with High Resolution, High Speed and Low Area ADC

This paper proposes a digital fuzzifier with 7 bit resolution. To achieve a high performance, the A/D conversion and fuzzification operation are done simultaneously on the same functional block, through a programmable membership function. To implement the idea we have used flash method for the 4 LSBs which results in high speed conversion. Although the 4 bit converting is adequate for most practical applications, we take advantage from successive approximation technique to achieve better precision, if needed. The proposed converter allows a significant amount of silicon area to be saved compared to fully parallel A/D. Result of extracting of the 7 bit A/D converter shows that the size of converter's layout is less than 0.02 mm² in 0.35μm CMOS standard technology. Moreover, the Hspice simulation showed that it can achieve 25 MHz speed and total power dissipation is 5mw in the aforementioned technology.