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Efficient Field Programmable Gate Array Implementation for Moving Object Segmentation using BMFCM


Affiliations
1 Department of Electronics and Communication Engineering, Jawaharlal Nehru Technological University, Kukatpally, Hyderabad – 500085, Telangana,, India
2 Department of Computer and Information Science, Majmaah University, Kingdom of Saudi Arabia,, Saudi Arabia
 

Objective: In Real time video analysis as storing, retrieving the video data and video segmentation are major issues. This paper presents the motion object video Segmentation process implementation on Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuits (ASIC). Methods/Statistical analysis: The statistical background models like Gaussian Mixture Model (GMM) and Iterative Conditional Mode (ICM) were introduced with robust feature in multi model schemes. Due to computational complexity and less accuracy of identified object, such algorithm fails to implement in real time concern. For this purpose, the simulation was conducted to generate the accurate values using the combo of Background Modelling with Fuzzy-C-Means (BMFCM). The background model is used to find the stationary and non-stationary pixel in the video frames and FCM is used to boost the accuracy of clustering under noise. Findings: The proposed BMFCM algorithm examines through different videos were considered and corresponding metrics values of Precision, Recall, F-Measure, etc. was derived, those values are enhanced 3% over the existing statistical methods. After the simulation, the architecture was designed for BMFCM and implemented on Xilinx Vivado FPGA’s devices using ISE tool fitting and ASIC using Cadence tool (TMSC 180nm technology). Application/ Improvement: The performance of the algorithm shows significant evidence for enhance the accuracy of segmentation process and implementation results shows that the complexity of architecture decreased in both FPGA and ASIC. So that BMFCM architecture is used to real time applications efficiently.

Keywords

Back Ground Modelling, FCM, FPGA, Precision, TSMC
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  • Efficient Field Programmable Gate Array Implementation for Moving Object Segmentation using BMFCM

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Authors

Siva Nagi Reddy Kalli
Department of Electronics and Communication Engineering, Jawaharlal Nehru Technological University, Kukatpally, Hyderabad – 500085, Telangana,, India
Bhanu Murthy Bhaskara
Department of Computer and Information Science, Majmaah University, Kingdom of Saudi Arabia,, Saudi Arabia

Abstract


Objective: In Real time video analysis as storing, retrieving the video data and video segmentation are major issues. This paper presents the motion object video Segmentation process implementation on Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuits (ASIC). Methods/Statistical analysis: The statistical background models like Gaussian Mixture Model (GMM) and Iterative Conditional Mode (ICM) were introduced with robust feature in multi model schemes. Due to computational complexity and less accuracy of identified object, such algorithm fails to implement in real time concern. For this purpose, the simulation was conducted to generate the accurate values using the combo of Background Modelling with Fuzzy-C-Means (BMFCM). The background model is used to find the stationary and non-stationary pixel in the video frames and FCM is used to boost the accuracy of clustering under noise. Findings: The proposed BMFCM algorithm examines through different videos were considered and corresponding metrics values of Precision, Recall, F-Measure, etc. was derived, those values are enhanced 3% over the existing statistical methods. After the simulation, the architecture was designed for BMFCM and implemented on Xilinx Vivado FPGA’s devices using ISE tool fitting and ASIC using Cadence tool (TMSC 180nm technology). Application/ Improvement: The performance of the algorithm shows significant evidence for enhance the accuracy of segmentation process and implementation results shows that the complexity of architecture decreased in both FPGA and ASIC. So that BMFCM architecture is used to real time applications efficiently.

Keywords


Back Ground Modelling, FCM, FPGA, Precision, TSMC



DOI: https://doi.org/10.17485/ijst%2F2017%2Fv10i1%2F138541