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Real Time Computer Vision Systems for Rice Kernels


Affiliations
1 PTU Kapurthala, Jalandhar - 144603, Punjab, India
2 CT Group of Institutions, Jalandhar - 144008, Punjab, India
 

Objectives: This paper presents a Morphological operations based software code in MATLAB for counting connected rice kernels from digital image and to grade the quality of samples by a methodology used by the Bureau of Indian standards. Methods/Statistical Analysis: The proposed code may further be transferred on to the reprogrammable hardware devices like FPGA by converting the entire code into VHDL (VHSIC Hardware Description Language) with the help of Simulink HDL Coder; making it a hardware compatible code. The efficiency of proposed code is tested over the digital images of rice grain samples with complex backgrounds or captured under poor illumination conditions. Findings: 100% accuracy has been observed in the counting efficiency of software and hardware codes by successfully separating touching kernels. The automatically generated VHDL code through HDL Coder is also successfully synthesized over the FPGA in Xilinx ISE and is compared for its accuracy and processing time with simulated results. It is concluded that a real time image processing algorithm, when design effectively to get synthesized over the FPGAs, may yield faster results with processing time of few seconds, whereas the manual methods or simulated methods are much slower in terms of their speed. Application/ Improvements: The proposed approach may further be utilized to design a portable FPGA based hardware prototype to grade the quality of rice samples by completing eliminating the manual investigation done by humans as well as by computer based simulated inspection.

Keywords

Embedded Imaging, FPGA, HDL Coder, Image Processing, MATLAB, VHDL, Xilinx ISE.
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  • Real Time Computer Vision Systems for Rice Kernels

Abstract Views: 217  |  PDF Views: 0

Authors

Bhupinder Verma
PTU Kapurthala, Jalandhar - 144603, Punjab, India
Gurpreet Kaur
CT Group of Institutions, Jalandhar - 144008, Punjab, India

Abstract


Objectives: This paper presents a Morphological operations based software code in MATLAB for counting connected rice kernels from digital image and to grade the quality of samples by a methodology used by the Bureau of Indian standards. Methods/Statistical Analysis: The proposed code may further be transferred on to the reprogrammable hardware devices like FPGA by converting the entire code into VHDL (VHSIC Hardware Description Language) with the help of Simulink HDL Coder; making it a hardware compatible code. The efficiency of proposed code is tested over the digital images of rice grain samples with complex backgrounds or captured under poor illumination conditions. Findings: 100% accuracy has been observed in the counting efficiency of software and hardware codes by successfully separating touching kernels. The automatically generated VHDL code through HDL Coder is also successfully synthesized over the FPGA in Xilinx ISE and is compared for its accuracy and processing time with simulated results. It is concluded that a real time image processing algorithm, when design effectively to get synthesized over the FPGAs, may yield faster results with processing time of few seconds, whereas the manual methods or simulated methods are much slower in terms of their speed. Application/ Improvements: The proposed approach may further be utilized to design a portable FPGA based hardware prototype to grade the quality of rice samples by completing eliminating the manual investigation done by humans as well as by computer based simulated inspection.

Keywords


Embedded Imaging, FPGA, HDL Coder, Image Processing, MATLAB, VHDL, Xilinx ISE.



DOI: https://doi.org/10.17485/ijst%2F2016%2Fv9i45%2F128476