Open Access Open Access  Restricted Access Subscription Access

Power Domain, Physical Aware Scan Chain Allocation and Reordering


Affiliations
1 Department of Micro and Nanoelectronics, VIT University, Vellore - 632014, Tamil Nadu, India
 

Objectives: An algorithm is proposed to allocate the scan cells to form a particular set of scan chains. The proposed algorithm reduces wire length and number of multi-voltage cells. This also maintains the balance of the chain. Methods: The proposed algorithm was implemented in Tool Command Language (TCL) and it works on the post placed database. The developed algorithm was tested on some of the industrial designs. Findings: The proposed algorithm was tested on some of the industrial designs and a reduction was observed in the scan chains wire length (about 10%) and a much greater reduction in the count of the lockup latches (about 90%). Improvements/Applications: This will ensure a reduction in congestion as well as reduced area requirements.

Keywords

Design for Testability (DFT), Multi-Domain Mixing, Scan Allocation, Scan Segments.
User

Abstract Views: 165

PDF Views: 0




  • Power Domain, Physical Aware Scan Chain Allocation and Reordering

Abstract Views: 165  |  PDF Views: 0

Authors

Deepa Divakar
Department of Micro and Nanoelectronics, VIT University, Vellore - 632014, Tamil Nadu, India
V. Arunachalam
Department of Micro and Nanoelectronics, VIT University, Vellore - 632014, Tamil Nadu, India

Abstract


Objectives: An algorithm is proposed to allocate the scan cells to form a particular set of scan chains. The proposed algorithm reduces wire length and number of multi-voltage cells. This also maintains the balance of the chain. Methods: The proposed algorithm was implemented in Tool Command Language (TCL) and it works on the post placed database. The developed algorithm was tested on some of the industrial designs. Findings: The proposed algorithm was tested on some of the industrial designs and a reduction was observed in the scan chains wire length (about 10%) and a much greater reduction in the count of the lockup latches (about 90%). Improvements/Applications: This will ensure a reduction in congestion as well as reduced area requirements.

Keywords


Design for Testability (DFT), Multi-Domain Mixing, Scan Allocation, Scan Segments.



DOI: https://doi.org/10.17485/ijst%2F2016%2Fv9i37%2F126812