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Nerenjana, J.
- Optimistic Technique for Smart Grid Infrastructure Using Sensor Network
Authors
Source
International Journal of Innovative Research and Development, Vol 3, No 2 (2014), Pagination:Abstract
Smart grid integrates electrical grids and communication infrastructures and forms an intelligent electricity network working with all connected components to deliver sustainable electricity supplies. Smart grid (SG) is an intelligent control system over sensors and communication. A communication is an essential part to the success of the smart grid. For that cognitive radio (CR) networks to reduce the communication interferences and improve the bandwidth efficiency for smart grid communication. There is an essential need to use the CR communication to support large-size and time-sensitive delivery for future smart grid system. In this paper, develop smart grid infrastructure the grid is primarily radial built for centralized power generation and is dependent on manual restoration. First, the design scheme of a conventional power distribution system configuration that adopts distribution automation is introduced. The possibility to store energy, to exchange power and information on demand and production among grids allows us to achieve an active distribution, which can forecast demand and production and are able to exchange power in order to enhance the quality of service. And further the project propose a priority-based approach for CR communication infrastructure based smart grid system according to the various traffic types of smart grid such as control commands, multimedia sensing data and meter readings.
Keywords
cognitive radio (CR), smart grid (SG), channel allocation, traffic scheduling, grid infrastructure, prioritized networkFull Text
- Efficient Reduction of Area and Delay in Null Convention Logic Design Paradigm
Authors
Source
International Journal of Innovative Research and Development, Vol 3, No 2 (2014), Pagination:Abstract
Synchronous circuit designs face many challenges such as clock skew, clock jitter and power consumption. Asynchronous clockless circuit design is a solution to these clock issues. Asynchronous circuits have merits of low power, anti-interference, high robustness, and module reusability due to its clockless nature. NULL Convention Logic (NCL) is one of the promising candidates for asynchronous circuit design paradigms. NCL circuits are said to be correct-by-construction and delay insensitive circuits. In this paper, a new methodology for mapping multi-rail logic expressions to NULL convention logic (NCL) gate library is proposed to reduce area and delay of NCL circuits when compared to the existing algorithm.
Keywords
synchronous, asynchronous, NCL circuits, mappingFull Text