Networking and Communication Engineering

D. Rosy Salomi Victoria ¹, S. Senthil Kumar ²

Affiliations
1 Computer Science and Engineering Department, St. Joseph’s College of Engineering, Chennai, Tamilnadu, IN
2 Electrical Engineering Department, Government College of Engineering, Salem, Tamilnadu, IN

Abstract

Spectral resources are to be divided among the users in order to maximize total user utility. A new scheme for packet transmission in various traffic patterns has been developed by introducing a bandwidth based Round Robin scheduler. Our scheduling algorithm has the abilities of reducing frame lengths and rounds. There is no packet drop in our implementation. User favors application service with a higher percentage of bandwidth in order to provide QoS. Our scheduling has reduced the inter transmission time of packets from the same stream. We define a stream to be the traffic that comes from a particular source destinated to the output router. The starvation of lower priority class data has been avoided. It reduces burst generation at the output port from the same traffic stream. The streams fairness has been ensured. The performance of this scheduler has been shown by comparing with Output Controlled Round Robin algorithm in terms of transmission rate, jitter, bandwidth, scheduling and latency.

Keywords

Bandwidth based Round Robin, Guaranteed Service, Maxmin Fair Scheduling, Robust Opportunistic Scheduling.

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M. Manjupriya ¹, S. Senthil Kumar ²

Affiliations
1 Selvam College of Technology, Namakkal, Tamil Nadu, IN
2 VelTech Dr. RR & Dr. SR Technical University, Chennai, Tamil Nadu, IN

Abstract

The embedded hardware plays a vital role in the implementations of many cryptographic applications to increase the security with reduced area consumption. The applications based on data communication demands the encryption process for sensitive data transmission from one end to the other end. The software implementation of security algorithms is easy to implement but it lags in its execution speed and performance. Therefore, the hardware implementations are considered to be a good alternative, since they provide additive performance along with low power consumption and less memory. The tiny encryption algorithm TEA is one of the fastest and efficient cryptographic algorithms, which is well suited for many such real time data communications that requires moderate security. An extended tiny encryption algorithm XTEA is a corrected form of TEA which resolves the drawbacks of TEA in real time implementation such as related key and plain text attacks. This paper discusses and analyzes the hardware implementation of XTEA with TEA in FPGA to overcome the above drawbacks associated with it.

Keywords

Encryption, Feistel Block Ciphers, RFID, Round Functions, TEA, XTEA.

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