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Source
Automation and Autonomous Systems, Vol 6, No 1 (2014), Pagination:
Abstract
Reducing power dissipation and fast operation has become an important objective in the design of digital circuits. The need for low power design is a major issue in many high performance systems such as microprocessor, DSP, and other applications. In case of CMOS devices, scaling down the channel length is a mechanism to reduce the power consumption as well as delay. But as the technology scales down to nm range the CMOS transistors get affected by short channel effects, including DIBL effect, voltage saturation and mobility degradation. There are many solutions proposed to get rid of these limitations. Among them, Carbon Nano Tubes (CNTs) are found to be a promising building block of a future nano electronic technology. The Carbon Nano Tube Field Effect Transistors (CNTFETs) use CNTs as the channel material instead of bulk silicon. In this paper encoder and decoder is designed using a logic called BCDL (Boosted CMOS Differential Logic) which uses CMOS transistors. Then the CMOS transistors are replaced with CNTFET with single CNT as a channel. All the circuits are made to operate in the region called NTC (Near Threshold Computing). In comparison with CMOS circuits, the circuits using CNTFET consume 50% less power with increased speed up to 40%. Power Delay Product design metric (PDP) is chosen for comparison. All the circuits are simulated using SYNOPOSYS HSPICE.
Keywords
DIBL Effect, NTC, CNT, CNTFET, BCDL Logic, PDP.
