Harpreet Singh ¹, Shekhar Verma ¹, Gaganpreet Kaur Marwah ¹

Affiliations
1 Department of Electronics and Communication Engineering, Lovely Professional University Phagwara - 144411, Punjab, IN

Abstract

Magnetic resonance imaging is most widely used radiographic technique in diagnosis, clinical research and studies as well as treatment planning of major diseases. Generally GLCM and PCA technique are used for the feature extraction and classification but this technique increased the complexity and it’s robust in nature. In this paper we used the Gabor filter with wavelet transformation classification technique for analyzing Magnetic response images. In this paper, the detection of abnormality in the patient’s image is automatically recognized using texture analysis. The hybrid technique may work as an automatic classification of abnormalities in lungs MRI images, which can help radiologist in performing an in-depth examination. The texture analyses of both the normal and abnormal images are done. On the bases of the values of abnormal images, the range is calculated and further it is compared with the texture features of normal image. So, to determine the whether the abnormality is there or not in the image, its texture features are observed and the feature lying outside the range finally concludes that image is normal. Five cases are observed, on the bases of their comparison, the result is obtained at the end indicating the whether the presence of abnormality in the image.

Keywords

Gabor Filter, Feature Extraction, Magnetic Response Images, Texture Classification

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Mohinder Bassi ¹, Shekhar Verma ¹, Rupendeep Kaur ²

Affiliations
1 Department of Electronics and Communication Engineering, Lovely Professional University Phagwara - 144411, Punjab, IN
2 2Department of Electronics and Communication Engineering, Guru Nanak Dev University Amritsar - 143005, Punjab, IN

Abstract

Background: Multiplier is very important block which is being used in number of devices like DSP processor and microprocessors. Power consumption by multipliers decides the battery life of all these devices. Researchers are continuously striving for the multiplier which consumes less power but as the most dominant technology till now is CMOS, their efforts are not giving fruitful results due to physical constraints of CMOS device. Methods: In the proposed design used a reversible computing methodology and for circuit designing of multiplier used a QCA Cells. Findings: By combination of reversible computing and ancient Vedic method, a low power and high speed multiplier is proposed. Improvements: With this proposed technique, the Garbage outputs are reduced by 25%, numbers of gates are reduced by 5.40%, numbers of constant inputs are reduced by 6.89%, Quantum cost is reduced by 7.89% and TRLIC factor of this vedic multiplier is reduced by 16.89%.

Keywords

Reversible Logi, Quantum Cost, Urdhva Triyag Sutra, Vedic, VLSI

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Misbah Manzoor ¹, Shekhar Verma ², Tapsi Singh ², Mahwash Manzoor ²

Affiliations
1 Department of Electronics and Communication Engineering, SSM College of Engineering, Srinagar - 191111, Jammu and Kashmir, IN
2 Department of Electronics and Communication Engineering, Lovely Professional University, Phagwara - 144411, Punjab, IN

Abstract

The advent of dynamic logic especially domino logic has made the use of dynamic circuits very wide for the implementation of low power VLSI circuits. Dynamic logic style is becoming the designers' choice these days because it has very fast speed and occupies very small area. In this paper we have used various techniques based on domino logic to overcome noise. Each technique has its merits and demerits. Out of these techniques mentioned below we have taken two widely used techniques in domino logic, conditional keeper technique and diode footed domino. We calculated their noise margins at different values of supply voltage. We have done simulations in 90 nm technology. After calculations we found both techniques show fairly good noise immunity but diode footed domino gave better results.

Keywords

Delay, Diode Footed Domino, Immunity, Leakage Tolerance, Noise, Power Consumption, Subthreshold Voltage, Technology Scaling.

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