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Mahani, Negin
- Pseudo-System-Level Network-on-Chip Design and Simulation with VHDL: A Comparative Case Study on Simulation Time Trade-Offs
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Authors
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1 Zarand Higher Education Complex, Computer Engineering Department, Shahid Bahonar University, Kerman, Iran
1 Zarand Higher Education Complex, Computer Engineering Department, Shahid Bahonar University, Kerman, Iran
Source
Indian Journal of Science and Technology, Vol 9, No 7 (2016), Pagination:Abstract
Background/Objectives: To meet the challenge of increasing design complexity, designers are turning to System Level Design Languages (SLDLs) to model systems at a higher level of abstraction. Methods/Statistical Analysis: Now there are some system level languages like SystemC but hardware developers prefer HDL based languages like VHDL for coding. So focusing on methods for extending VHDL for system-level modeling is the issue of hardware modeling researches. VHDL itself has some high level structures to model near system-level. Here we have implemented a 9 switch Network-on-Chip (NoC) with processing and communication elements like FIFOs and we have tried to eliminate signals as communication elements between processing components and using high level structures in addition to resolution function (for the first time in NoC structure) in routing algorithm. Finding: Resolution function can decrease simulation speed as in the literature mentioned so we have applied some improving techniques for simulation accelerating to see the result of these tradeoffs. All in all the one with resolution function and other high level structures besides applying improving speed rules has better performance and we have gain about 28% speed up and 35% speed up in contrast to the latter one without eliminating possible signals. Conclusion/Application: All in all by using accelerating rules we had no simulation time penalty and gained 28% speed up. Resolution function is a high level structure which is used for hardware purposes, it is preferable than simply implementing the routing algorithm by other common statements.Keywords
High Level Structures, NoC, Resolution Function, System Level Design, VHDLFull Text
- Is Ada a good candidate for multiprocessor systems?
Abstract Views :144 |
PDF Views:0
Authors
Affiliations
1 Zarand Higher Education Complex, Computer Engineering Department, Shahid Bahonar University, Kerman, Iran
1 Zarand Higher Education Complex, Computer Engineering Department, Shahid Bahonar University, Kerman, Iran
Source
Indian Journal of Science and Technology, Vol 9, No 11 (2016), Pagination:Abstract
Background/Objectives: Choosing a proper programming language for optimizing performance of multiprocessor systems is a trite object in the recent data processing era. Methods/Statistical Analysis: This research investigates Ada concomitant features for multicore programming. We have done several experiments to back the step that Ada is one of the best candidates for multiprocessor systems and this language is childbearing to be improved for multicore prospectus. Finding: By analyzing the simulation result we can say that Ada new features for supporting multicore programming are useful and they have improved the simulation speed. Thus it’s better to schedule our tasks and set task affinity by a determined scenario using Ada new libraries rather than giving it simply to the underlying operation system. Conclusion/ Application: We have done some simulation on different platforms with different models to evaluate the speed up gained using new library packages useful for multicore programming in Ada language.Keywords
Ada Programming Language, Concurrent and Multicore Programming, Multicore and Multiprocessor Systems, ParallelFull Text