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Kaarthik, K.
- Variable Latency Approach in VLSI Adder Implemented to Reduce Area and Power
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Authors
K. Kaarthik
1,
C. Vivek
1
Affiliations
1 Department of Electronics and Communication Engineering, M. Kumarasamy College of Engineering (Autonomous), Thalavapalayam, Karur - 639113, Tamil Nadu, IN
1 Department of Electronics and Communication Engineering, M. Kumarasamy College of Engineering (Autonomous), Thalavapalayam, Karur - 639113, Tamil Nadu, IN