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Nandhini, B.
- Architecture for Image Contrast Enhancement Applications by Altera Quartus II
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Authors
Affiliations
1 Department of Electronics and Communication Engineering, M. Kumarasamy College of Engineering, Karur – 639113,Tamil Nadu, IN
1 Department of Electronics and Communication Engineering, M. Kumarasamy College of Engineering, Karur – 639113,Tamil Nadu, IN
Source
Indian Journal of Science and Technology, Vol 11, No 17 (2018), Pagination:Abstract
Objectives: To design the hardware architecture for contrast enhancement applications. Methods / Statistical Analysis: Image improvement is the technique utilized to make strides the visible illustration of an image. Histogram equalization is one of the most vital techniques of image improvement. Findings: The fundamental idea of histogram equalization is to re-map the gray degrees of the image. Indeed in spite of the fact that these approaches may improve the differentiate of a picture in a successful and proficient way, they ordinarily have a few downsides, like misfortune in data, commotion enhancement and over enhancement. In this extend a modern strategy which performs differentiate improvement may named as adjusted color protecting versatile gamma adjustment. The upgrade is gotten by a combination of altered histogram and its versatile gamma adjustment. Applications / Imporovement:The proposed strategy is analyzed for many differentiate test pictures. It works better than existing. In addition to that the VLSI architecture of the algorithm is developed for size 2×2 image using ALTERA QUARTUS II. The same architecture can be extended to entire image.Keywords
Altera Quartus II, Minimum Mean Brightness Error , Over Enhancement- Low Intricacy and Fast Design for Certain Delicate Choice RS Translating Decoder
Abstract Views :194 |
PDF Views:0
Authors
Affiliations
1 Department of Electronics and Communication Engineering, M. Kumarasamy College of Engineering, Karur – 639113, Tamil Nadu, IN
1 Department of Electronics and Communication Engineering, M. Kumarasamy College of Engineering, Karur – 639113, Tamil Nadu, IN
Source
Indian Journal of Science and Technology, Vol 11, No 17 (2018), Pagination:Abstract
Objective: The decoder dynamic power consumption has to be reduced. Delay in decoding must be reduced with lesser area. Better area consumption is one main objective of the Hi ECC technique. Methods/Statistical Analysis: Logarithmic delicate choice translating of Reed-Solomon codes can significant coding pick up with polynomial multifaceted nature. Especially, the low intricacies pursue (LCC) ASD interpreting has better execution many-sided quality exchange off. The test vectors should be added over and a polynomial determination conspire should be utilized to choose one introduction yield to send rest deciphering steps. Findings: In this technique RS codes are utilized for simplification. So improvements are proposed for a low many-sided quality polynomial determination plot. At that point introduction plot is produced to make disentangled polynomial determination by just chose vectors are interjected over. Two introductions can be brought together in single emphasis. To lessen dormancy parallel interpolator is utilized to get various yields and enhance speed. Application/Improvements: Data rate is reduced from 12Mbps to 1.1 Mbps. Encoder needs less computation time than decoder. Less computation time of decoder has to be considered for the improvement.Keywords
Decoding, High Speed, Interpolation, Low Complexity, RS Coder, LCC Decoding- Medical Image Retrieval System using 2D-DWT and Convolutional Neural Network
Abstract Views :210 |
PDF Views:0
Authors
Affiliations
1 Department of ECE, M. Kumarasamy College of Engineering, Karur – 639113, Tamil Nadu, IN
1 Department of ECE, M. Kumarasamy College of Engineering, Karur – 639113, Tamil Nadu, IN