Harkinder Kaur ¹, Amanpreet Kaur ², Harsh Sohal ², Isha Gupta ², Swati Singh ², Surbhi Nagpal ³

Affiliations
1 Department of Computer Science & Engineering, Chitkara University Institute of Engineering & Technology, Chitkara University, IN
2 Department of Electronics & Communication Engineering, Chitkara University Institute of Engineering & Technology, Chitkara University, IN
3 Techno planet labs Pvt Ltd, Faridabad - 121003, Haryana, IN

Abstract

In the following work RAM_Write_Control module has been designed and its performance has been analyzed in terms of utilization of power and energy in order to make it energy and power efficient. The main idea behind this unit is to control the data write operation to the core which is used for saving the raw data in impedance measurement module of Electrical Impedance Tomography (EIT) system, KHU Mark 2.5. The performance of the unit is analyzed using 14.2 version of Xilinx software at Virtex-5 FPGA chip. The total power consumption of 3 logic families HSTL (High Speed Transceiver Logic), LVCMOS (Low Voltage Metal Oxide Semiconductor) and LVTTL (Low Voltage Transistor-Transistor Logic) at different I/O Standards have been compared in order to excrete out the most energy efficient logic family. Frequency scaling technique has also been applied by varying the frequencies at a scale of 100 Hz i.e., from 400MHz to 500 MHz to 600 MHz to 700 MHz in a way to find out the most power efficient frequency. It has been observed minimum power consumption occurs in case if we use LVCOMS15 I/O standard of LVCMOS logic family in comparison to other IO standards of other 2 logic families. And this maximum power savage occurs at a lowest frequency of 400 MHz.

Keywords

Energy Efficiency, EIT RAM, FPGA, System, WRITE CONTROL, Xilinx.

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Amanpreet Kaur ¹, V. S. Dhaka ¹, Gurpreet Singh ¹

Affiliations
1 Yamuna Institute of Engineering and Technology, Gadholi, Jaipur National University, Jaipur, IN

Abstract

Objective: This paper tries to devise a new algorithm based on ACO as well as multipath routing in Adhoc Multipath Distance Vector (AOMDV) environment. Methods/Statistical Analysis: Routing is a technique of transmitting data from source node to the destination node. Path breaks frequently in MANET due to the moving nodes. Multipath Routing presents a solution towards this problem, because of the presence of alternative paths. So, communication does not halt. Ant Colony Optimization (ACO) is a newer field of swarm intelligence to tackle optimization problems. Findings: The new algorithm is named A-AOMDV and is compared with other multipath and unipath protocols. Some of the performance metrics are chosen to compare and evaluate the new routing algorithm with traditional algorithms like Throughput, Jitter, Number of packets send, End to End Delay, Packet Lost, Delivery Ratio. Based upon the obtained results, the comparison graphs have also been made while evaluating parameters. The results are very encouraging and the new algorithm has outperformed other algorithms used for the purpose of comparison. Applications: Data communication can take place through alternative paths using efficient multipath routing protocol and easily tackle problems of disconnections during data communication.

Keywords

AOMDV, A-AOMDV, DSDV, MDART, MANET.

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Vatsala Anand ¹, Amanpreet Kaur ¹

Affiliations
1 Department of Electronics and Communication Engineering, Chitkara University Institute of Engineering and Technology, Chitkara University, Chandigarh - 160 009, Punjab, IN

Abstract

Objectives: This paper proposes an Energy Efficient ARABIC Unicode Reader design on FPGA. Methods/Statistical Analysis: Two types of energy efficient techniques such as Frequency Scaling and FPGA technology scaling have been used to make the device energy and power efficient. In the frequency scaling technique the frequency of device has been varied from 1MHz to 1THz; whereas, in FPGA scaling technique the power consumption of the device at two FPGA technologies(Artix-7 and Virtex-6) has been compared in order to identify the most energy efficient technology at least power consumed frequency. Findings: In this Unicode reader, results have been analyzed using X Power Analyzer. Different types of tables have been created for different range of frequencies showing different power dissipation values. It has been observed that 99.67% of total power can be saved in case of Artix-7 while operating the device at a frequency of 1MHz instead of 1 THz and in case of Virtex-6 98.5% of total power can be saved while operating the device at a frequency of 1MHz instead of 1 THz. So it has been concluded that more amount of power has been dissipated in case of Virtex-6 FPGA technology in which the length of channel is 45nm in comparison to Artix-7 in which length of channel is 28nm. Also it is advisable to operate the device at a low range of frequencies in order to have less power consumption. Application/ Improvements: Conclusions drawn from the analysis will be helpful in making the device more power efficient as compared to the existing ones. It comes out to be a step towards Go-Green Mission in order to serve the humanity.

Keywords

Energy, FPGA, Frequency, Green Computing, Power, Unicode Reader, Xilinx

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Amirul Islam ¹, Amanpreet Kaur ¹

Affiliations
1 Yamuna Institute of Engineering and Technology, Gadholi – 133103, Haryana, IN

Abstract

Objectives: The main objectives of this work are to enable mobile nodes predict the switch off states of Hard Disk and other electronic components using APRIORI algorithm which has pre-mined list of timings of every request to be serviced by the node. Methods/Statistical Analysis: The application of this Algorithm is shown via Simulink (MATLAB). We use a Sequence generator of variable inputs (on/off) signals which controls the load circuit of the simulated node. The input of the sequence generator is defined by an example depicting a Mobile Node traversal and represented by a Table residing in the memory of the node. The table values are mined using preset values of Confidence and Support as in APRIORI algorithm. The data set used in the simulation represents all cases of the Algorithm in real time. Findings: Controlling the switch off states using pre-mined data values based on frequent item sets enables a Mobile Node to effectively decide the switch off states or power saving states for various electronic hardware, which includes Hard Disk. The Main power drawn in Hard Disk is by the Motor of the cylinder which if turned off and on (Spin UP/Spin DOWN) effectively will result in more efficient battery savings for each Mobile Node as compared to Adaptive and Threshold based Spin UP/ Spin DOWN based policies. Applications/Improvements: Since the switch timings decided by the algorithm entirely depend on mined values, application of better data mining techniques will result in more efficient battery operation.

Keywords

Power Conservation, Prediction based Algorithm, Wireless Networks, APRIORI, MANETS

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Savita ¹, Amanpreet Kaur ¹, Amanpreet Sandhu ¹, Isha Gupta ¹, Amandeep Kaur ², Sonam Dhingra ³

Affiliations
1 Department of Electronics and Communication Engineering, Chitkara University Institute of Engineering and Technology, Chitkara University Chandigarh – 140401, Punjab, IN
2 Department of Computer Science Engineering, Chitkara University Institute of Engineering and Technology. Chitkara University Chandigarh – 140401, Punjab, IN
3 Kurukshetra University, Kurukshetra – 136119, Haryana, IN

Abstract

An energy efficient Telugu Unicode Reader has been designed in the following research paper. Telugu Unicode reader design has range of characters from 0C00-0C7F. It is most spoken script for Telugu people. This script is also used for writing Sanskrit texts. Telugu script shares many similarities with the Kannada script and is derived from old Kannada script. In the following paper Telugu Unicode reader code has been implemented on Xilinx ISE design suit 14.2. and is synthesized on Virtex-6 and Artix-7 FPGA technology by applying frequency scaling technique. This Unicode reader design is synthesized on different frequencies of 1THz, 100GHz, 10GHz, 10GHz, 1GHz, 100MHz, 10MHz, 1MHz. This Telugu Unicode reader can detect vowels, consonants, digits etc of Telugu language.

Keywords

Energy Efficient Hardware Design, FPGA technology, Frequency Scaling, Telugu Unicode Reader, Xilinx

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