Informatics Publishing Limited

Durgam Sumalatha ¹, B. Gouri Sivanandini ², T. Sireesha ², R. Maruthi Sivakanth ³

Affiliations
1 Aurora's Engineering College, Bhongir, Nalgonda, AP, IN
2 ECE Dept., Aurora's Engineering College, Bhongir, Nalgonda, AP, IN
3 RGMCET, Nandyal, AP, IN

Abstract

Now a day's VLSI has become the backbone of all types of designs, and in deep sub-micrometer designs the interconnect delay playing vital role in limiting the circuit performance. The same is also limited by crosstalk in an on-chip bus and is highly dependent on the data patterns transmitted on the bus. Till now different crosstalk avoidance coding schemes have been proposed to boost the bus speed and/or reduce the overall energy consumption. Though there are many coding techniques, none of them has been successful in giving a perfect mechanism in mapping of datawords to codewords for CODEC design. It was found that this is mainly due to the nonlinear nature of the crosstalk avoidance codes (CAC). Due to the lack of practical CODEC construction schemes, it has overburdened the use of such codes in practical designs. This work presents guidelines for the CODEC design of the "forbidden pattern free crosstalk avoidance code" (FPF-CAC). The properties of the FPF-CAC have been analyzed and it is showed that mathematically, a mapping scheme exists based on the representation of numbers in the Fibonacci numeral system. The First proposed CODEC design offers a near-optimal area overhead performance. An improved version of the CODEC is then presented, which achieves theoretical optimal performance. The work has been done in investigating the implementation details of the CODECs, including design complexity and the speed. Optimization schemes are provided to reduce the size of the CODEC and improve its speed.  With the proposed technique the delay has been reduced with reference to coded and uncoded bus for different widths.

Keywords

CODEC, Crosstalk, Fibonacci Number System, On-Chip Bus.

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T. Sireesha ¹, K. Sreenivasa Ravi ¹

Affiliations
1 Department of ECM, KL University, Guntur District - 522502, Andhra Pradesh, IN

Abstract

Background/Objectives: The main objective of this paper is to perform a comparative discussion in gyro parameters for three cases: (i) V2π (vary)&Vπ/2 (constant), (ii) Vπ/2 (vary) and V2π (constant) and (iii) both V2π and Vπ/2 are varying simultaneously. Methods/Statistical Analysis: Fibre optic gyroscope has to be operated in closed-loop approach to achieve the inertial-grade-performance. The Closed-Loop Interferometric Fibre Optic Gyroscope (CLIFOG) system depends upon ramp voltage (V2π of IOC) and square-wave biasing signal frequency (f_bias). The digital-phase-ramp-function is used as feedback to system and makes gyro to null condition. The biasing signal voltage (Vπ/2) is 1/4^th of ramp voltage (V2π). If there are any variations in ramp and biasing signal voltages, then it introduces variations in gyro performance. Results: The ramp voltage (V2π) and square wave biasing signal voltage (Vπ/2) is increased from 1% to 10%, decreased to 1% to 10% and performed the various tests for three cases. From results, it was noted that: (i) When V2π is varying and Vπ/2 is kept constant, the scale-factor change is increasing as the error in the signal voltage is also increases. (ii) When V2π is kept constant and Vπ/2 is varying, the change in scale-factor is very minute and maintains the scale-factor linearity. (iii) While varying both V2π and Vπ/2 voltages simultaneously, the device is not responding accordingly as the error is increasing and also scale-factor is out of range subsequently. The effects on the CLIFOG system are described with the derived values in terms of bias and scale-factor. The gyro performance is very sensitive with respect to V2π variations and the percentage error is high in gyro output, but very less effect due to Vπ/2 variations when the ramp voltage (V2π) is constant. Conclusion/Application: The Closed Loop Interferometric Fiber Optic Gyroscope (CLIFOG) system requires a proper resetting of ramp voltage (V2π) in order to avoid the bias and scale factor instabilities.

Keywords

CLIFOG, Closed Loop Approach, Fiber Optic Gyroscope, Ramp Voltage (v2π), Square Wave Bias Voltage (vπ/2).

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