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Ramanjappa, T.
- Implementation of Low Power Pipelined 64-bit RISC Processor with Unbiased FPU on CPLD
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Authors
Affiliations
1 Department of Physics, SKUCET, Sri Krishnadevaraya University, Anantapur - 515003, Andhra Pradesh, IN
2 Department of Applied Sciences, St. Ann’s College of Engineering Technology, Chirala - 523187, Andhra Pradesh, IN
3 Department of Physics, Government Arts and Science College, Anantapur - 515 001, Andhra Pradesh, IN
4 Department of Physics, Sri Krishnadevaraya University, Anantapur - 515003, Andhra Pradesh, IN
1 Department of Physics, SKUCET, Sri Krishnadevaraya University, Anantapur - 515003, Andhra Pradesh, IN
2 Department of Applied Sciences, St. Ann’s College of Engineering Technology, Chirala - 523187, Andhra Pradesh, IN
3 Department of Physics, Government Arts and Science College, Anantapur - 515 001, Andhra Pradesh, IN
4 Department of Physics, Sri Krishnadevaraya University, Anantapur - 515003, Andhra Pradesh, IN
Source
Indian Journal of Science and Technology, Vol 9, No 33 (2016), Pagination:Abstract
Background/Objective: Now a day’s electronics industry people are concentrating on low power designs. The growing market of portable electronic systems demands microelectronic circuit with ultra low power dissipation. Method: The accomplished operations in this design are logical operations, the arithmetic operations, and branch operations. The outcome values of these operations stored in the registers and they can retrieve from the same when needed. The low power RISC processor with unbiased double precision FPU is designed without any complication, because the power reduction can do in front end technique. Findings: On MAX V CPLD a low power pipelined 64-bit RISC processor is implemented. Arithmetic operations, logical and branch functions of RISC processor are successfully verified with this design. In order to avoid any misbehavior in the jump instructions, the data will flush in the pipeline automatically by the processor architecture. This processor contains FPU unit, which supports double precision IEEE-754 format operations very accurately. Modelsim software is used to verify the simulation results of the design. The ALU operations and double precision floating point arithmetic operation results will be displayed on 7-Segments.Keywords
Altera Max V, CPLD, Low power, Modelsim, RISC.Full Text
- Excess Thermodynamic Fluctuation Parameters of Binary Mixtures of Acetonitrile, Benzene and Dimethyl-Formamide at 298.15 K
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Authors
Affiliations
1 Department of Physics, University of Botswana, Gaborone, BW
2 Department of Physics, Sri Krishnadevaraya University, Anantapur-515003, IN
1 Department of Physics, University of Botswana, Gaborone, BW
2 Department of Physics, Sri Krishnadevaraya University, Anantapur-515003, IN
Source
Journal of Pure and Applied Ultrasonics, Vol 25, No 3 (2003), Pagination: 101-104Abstract
The parameters characterizing thermodynamic fluctuations namely mean square fluctuations of pressure <(ΔP)2>, temperature <(ΔT)2>, number of molecules in a given volume < (ΔN/N)2> and the correlation function of pressure and temperature fluctuations <(ΔP)(ΔT)> in the binary mixtures of CH3CN + C6H6, C6H6 + HCON(CH3)2 and CH3CN + HCON(CH3)2 at 298.15 K have been evaluated using the data on ultrasonic velocity, density, molar heat capacity at constant pressure and thermal expansion coefficient. The corresponding excess functions have been evaluated considering that the ideal values are additive on mole fraction basis. The variations of <(ΔP)2>E, <(ΔT)2>E, < (ΔN/N) >E and <(ΔP)(ΔT)>E with the mole fraction of the first component are found to exhibit extrema at intermediate concentrations. The residts are explained in the light of modification of the structure of pure liquids as a result of mixing with the other and stability of the structure formed in the mixtures against the various thermodynamic fluctuations present in the liquid state.Full Text