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Oza, Shruti
- A Spatial Domain based Secure and Robust Video Watermarking Technique using Modified LSB and Secret Image Sharing
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Authors
Affiliations
1 Department of Electronics and Telecommunication Engineering, Pune Institute of Computer Technology, IN
1 Department of Electronics and Telecommunication Engineering, Pune Institute of Computer Technology, IN
Source
ICTACT Journal on Image and Video Processing, Vol 10, No 1 (2019), Pagination: 2061-2070Abstract
This paper proposes a spatial domain based video watermarking scheme to improve security of the video data using a combination of modified LSB watermarking technique of spatial domain and a (n, n) secret image sharing scheme. In this scheme the secret image sharing scheme is applied during transmission right after the embedding of the watermark in the video frame to overcome the drawback of the single LSB technique. This combination ensures high security and robustness as the watermarked image is being distributed into 3 meaningless shares during transmission thus making it imperceptible to the attacker. This dual scheme improves the extraction capability of the secret message and enhances the information embedding capacity. The average PSNR obtained was 55dB which proves that the quality of reconstruction is high and higher than most of the existing watermarking techniques in similar domain.Keywords
LSB, Secret Image Sharing, Video Watermark, Robustness.References
- Li Liu, Anhong Wang, Chin-Chen Chang and Zhihong Li, “A Secret Image Sharing with Deep-Steganography and two-Stage Authentication based on Matrix Encoding”, International Journal of Network Security, Vol. 19, No. 3, pp. 327-334, 2017.
- K.N. Sowmya and H.R. Chennamma, “Video authentication using Watermark and Digital Signature-A Study”, Proceedings of 1st International Conference on Computational Intelligence and Informatics, pp. 53-64, 2017.
- Ranjeet Kumar Singh, Dilip Kumar Shaw and M. Javed Alam, “Experimental Studies of LSB Watermarking with Different Noise”, Proceedings of 11th International Multi-Conference on Information Processing, Vol. 54, pp. 612-620, 2015.
- Yu Lun Wang, Jau-Ji Shen and Min-Shiang Hwang, “An Improved Dual Image based Reversible Hiding Technique using LSB Matching”, International Journal of Network Security, Vol. 19, No. 5, pp. 858-862, 2017.
- Kaiser J. Giri and Rumaan Bashir, “Digital Watermarking: A Potential Solution for Multimedia Authentication”, Proceedings of International Conference on Intelligent Techniques in Signal Processing for Multimedia Security, Vol. 660, pp. 93-112, 2017.
- Qingtang Su and Beijing Chen, “Robust Color Image Watermarking Technique in the Spatial Domain”, International Journal on Soft Computing, A Fusion of Foundation, Methodology and Application, Vol. 22, No. 1, pp. 91-106, 2018.
- Farnaz Arab, Shahidan M. Abdullah, Mazdak Zamani, Siti Zaiton Mohd Hashim, Azizah Abdul Manaf and Mazdak Zamani, “A Robust Video Watermarking Technique for the Tamper Detection of Surveillance Systems”, Multimedia Tools and Applications, Vol. 75, No. 18, pp. 10855-10885, 2016.
- Biswapati Jana, Debasis Giri and Shyamal Kumar Mondal, “Dual-Image based Reversible Data Hiding Scheme using Pixel Value Difference Expansion”, International Journal of Network Security, Vol. 18, No. 4, pp. 633-643, 2016.
- Adi Shamir, “How to Share a Secret”, Communications of the ACM, Vol. 22, No. 11, pp. 612-613, 1979.
- G.R. Blakley, “Safeguarding Cryptographic Keys”, Proceedings of International Conference on Computer History, pp. 313-317, 1979.
- Lin Dong and Min Ku, “Novel (n, n) Secret Image Sharing Scheme based on Addition”, Proceedings of 6th International Conference on Intelligent Information Hiding and Multimedia Signal Processing, pp. 583-586, 2010.
- Chin-Chen Chang, Yi-Pei Hsieh and Chia-Hsuan Lin, “Sharing Secrets in Stego Images with Authentication”, Pattern Recognition, Vol. 41, pp. 3130-3137, 2008.
- An Efficient Viterbi Algorithm for Communication System
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Authors
Affiliations
1 PG student, Dept of Electronics and Communication, Bharati Vidyapeeth (Deemed to be University) College of Engineering, Pune-43,, IN
2 Professor, and Head, Dept of Electronics and Tele-Communication, Bharati Vidyapeeth (Deemed to be University) College of Engineering, Pune-43,, IN
1 PG student, Dept of Electronics and Communication, Bharati Vidyapeeth (Deemed to be University) College of Engineering, Pune-43,, IN
2 Professor, and Head, Dept of Electronics and Tele-Communication, Bharati Vidyapeeth (Deemed to be University) College of Engineering, Pune-43,, IN
Source
Research Journal of Engineering and Technology, Vol 13, No 1 (2022), Pagination: 10-16Abstract
The Viterbi decoding algorithm is widely used in areas like Decoding convolutional codes in satellite communication, digital TV, wireless local area networks, mobile relay. Also, the method is used in the development of Automatic Speech Recognition (ASR) and storage systems that work automatically. For Viterbi decoder-based architectures with low latency and complexity, which proposes error detection techniques that are effective. This paper explores the Viterbi algorithm which has two types of approaches for two types of subparts. Important aspects of any communication system are area/power consumption and throughput /efficiency. Minimization of these aspects is the need for an efficient system. This paper explores unwanted logical block reduction by modifying the present logical block. This paper explores signature-based approaches which result in acceptable efficiency. Also, another approach is used to achieve error detection in permanent and transient faults. This error detection is achieved by recomputing with encoded operands. Encoding means the use of shifting operation or the use of rotation operation. This approach makes the system slightly efficient. The proposed approaches can be based on reliability and the efficiency objective.Keywords
Viterbi Algorithm, Field Programmable Gate Array (FPGA), Transient and Permanent Fault, Self-Checking Adder.References
- J. Viterbi, “Error bounds for convolutional codes and an asymptotically optimum decoding algorithm,” IEEE Trans. Inf. Theory, vol. 13, no. 2, pp. 260 – 269, 1967.
- Vaithiyanathana D, Nargisb J, and Seshasayanana R 2015 High-performance ACS for Viterbi decoder using pipeline T-Algorithm, Alexandria Engineering Journal vol 54 issue 3 pp 447–55
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- H. Liu, Z. Wang, X. Huang, K. Z. Liu, Z. Wang, X. Huang, and K. Zhang, “High-speed low-power Viterbi decoder design for tcm decoders,” IEEE Trans. VLSI Syst., vol. 20, no. 4, pp. 755–759, Apr 2012.
- K. Arunlal and S. Hariprasad, “An efficient Viterbi decoder,” Int. Journal of Advanced Information Technology, vol. 2, no. 1, Feb 2012.
- J. Kong and K. Parhi, “K-nested layered look-ahead method and architectures for high throughput Viterbi decoder,” in Proc. IEEE Workshop on Signal Processing Systems, 2003, pp. 99 – 104.
- G. Jung, J. Kong, G. Sobelman, and K.Parhi, “High-speed add-compare-select units using locally self-resetting CMOS,” in IEEE Int. Symp.Circuits and Systems, vol. 1, 2002, pp. 889–892.
- M. Akbar and J.-A. Lee, “Comments on ‘self-checking carry-select adder design based on two-rail encoding’,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 61, no. 7, pp. 2212–2214, Jul. 2014.
- Reliable Low-Latency Viterbi Algorithm Architectures Benchmarked on ASIC and FPGA Mehran Mozaffari Kermani, Senior Member, IEEE, Vineeta Singh, Member, IEEE, and Reza Azarderakhsh, Member, IEEE.