Informatics Publishing Limited

V. Mohan ¹, J. Raja ², S. Jeevananthan ³

Affiliations
1 E.G.S. Pillay Engineering College, Nagapattinam, IN
2 Anna University of Technology, Tiruchirappalli, IN
3 Pondicherry Engineering College, Pondicherry, IN

Abstract

A novel hybrid pseudo randomized triangular carrier and randomized pulse position scheme for voltage source inverter is proposed in this paper in order to disperse the acoustic switching noise spectra of an induction motor drive. The proposed random pulse width modulation (RPWM) pulses are produced through the logical comparison of a pseudorandom binary sequence (PRBS) bits with two random triangular carriers. Here, the PWM pulses of the proposed scheme possess the hybrid characteristic of the random pulse position PWM and the random carrier frequency PWM. The proposed technique is evaluated using MATLAB/Simulink and the results prove an excellent harmonic spectra spreading capability of the proposed hybrid scheme as compared with conventional schemes.

Keywords

Hybrid RPWM, Pseudorandom Carrier Modulation Method, Pseudo Random Binary Sequence (PRBS), RPWM, Voltage Source Inverter.

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S. Ramkumar ¹, V. Kamaraj ², S. Thamizharasan ¹, S. Jeevananthan ³

Affiliations
1 Department of EEE, Surya College of Engineering & Technology, Vikiravandi 605652, IN
2 Department of EEE, SSN College of Engineering, IN
3 Department of EEE, Pondicherry Engineering College, Puducherry, IN

Abstract

The recent developments in the field VLSI made Field Programmable Gate Arrays (FPGA) as one of the principal components in high performance processors especially in the area of communication engineering and power conversion utilities. FPGA have become an alternative solution for the realization of digital control systems, previously dominated by general purpose microprocessors/microcontrollers. In this paper, a reconfigurable Application Specific Integrated Circuit(ASIC) based on FPGA, used a gating pulse generator to generate gating pulses for power converters is presented. In addition, Modelsim SE is used for simulation study and validation of the proposed algorithm before implementation.

Keywords

FPGA, Programmable Architecture, Multilevel Inverter, Pulse Width Modulation.

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B. Muthukumar ¹, S. Jeevananthan ²

Affiliations
1 Sathyabama University, Chennai, IN
2 Department of Electrical and Electronics Engineering, Pondicherry Engineering College, Pondicherry, IN

Abstract

Elliptic Curve Cryptography (ECC) rules communication where the requirements of security, speed, key length and area constraints become main objective such as the portable device. Scalar multiplication becomes the key operation in any ECC, not only because it munches out major time, power and chip area, it is also a fact that the triumph of the Elliptic Curve Encryption Algorithm depends on the difficulty of calculating the multiplication. Hence the type of multiplier and its functional behavior become crux of the ECC architecture. This paper paves a way by developing a ECC architectures over GF(2160), which is bequeathed with three different multipliers namely array multiplier, modified booth multiplier and hybrid low power encoded multiplier. These multipliers are used in the Montgomery scalar multiplication algorithm to perform point addition and point doubling. The proposed ECC processor can perform the 160 bit point multiplication and coordinates conversion with 575mW, 511mW and 373mW in 100 MHz and 19176, 16260 and 8743 LUTs respectively in array multiplier, modified booth multiplier and hybrid multiplier. The architecture is implemented using spartan3E family device XC3S1600E using Modelsim 5.7 and Xilinx 9.2i.

Keywords

Array Multiplier, Elliptic Curve Cryptography, Hybrid Low Power Encoded Multiplier, Montgomery Multiplication Algorithm, Modified Booth Multiplier, Point Double, Point Addition.

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