Informatics Publishing Limited

R. Maheswari ¹, T. V. U. Kirankumar ², S. Kannappan ³

Affiliations
1 ECE Department, Agni College of Technology, IN
2 ECE Department, Bharath University, Chennai, IN
3 ECE, Agni College of Technology, IN

Abstract

Many rural regions around the world do not have good connectivity solutions which are economically viable. As a result, many of these regions remain disconnected from both the rest of the world. As of Internet World Stats 2007, the Internet penetration in North America is 69.7% of the population compared to 10.7% in Asia and 3.6% in Africa primarily restricted to urban areas. The fundamental problem in connecting rural regions is economics. None of the traditional wire-line connectivity solutions (fiber, broadband and dial-up) are economically viable for such regions. Satellite networks provide great rural coverage but at very high costs: the ISP rate for 1 Mb/s of satellite connectivity in Africa exceeds $3000/month.

For This reasons, We will describe the paper of WiMAX based Rural Extensions (WiRE), a new wireless network architecture that can provide connectivity to rural regions at extremely low costs.

Keywords

WiMAX, MAC, Access Point, Mobility, QOS.

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R. Maheswari ¹, V. Pattabiraman ¹

Affiliations
1 School of Computing Science and Engineering, Vellore Institute of Technology, Chennai, IN

Abstract

In this fast computing era, most of the embedded system requires more computing power to complete the complex function/ task at the lesser amount of time. One way to achieve this is by boosting up the processor performance which allows processor core to run faster. This paper presents a novel technique of increasing the performance by parallel HPRC (High Performance Reconfigurable Computing) in the CPU/DSP (Digital Signal Processor) unit of OR1200 (Open Reduced Instruction Set Computer (RISC) 1200) using Gene Expression Programming (GEP) an evolutionary programming model. OR1200 is a soft-core RISC processor of the Intellectual Property cores that can efficiently run any modern operating system. In the manufacturing process of OR1200 a parallel HPRC is placed internally in the Integer Execution Pipeline unit of the CPU/DSP core to increase the performance. The GEP Parallel HPRC is activated /deactivated by triggering the signals i) HPRC_Gene_Start ii) HPRC_Gene_End. A Verilog HDL(Hardware Description language) functional code for Gene Expression Programming parallel HPRC is developed and synthesised using XILINX ISE in the former part of the work and a CoreMark processor core benchmark is used to test the performance of the OR1200 soft core in the later part of the work. The result of the implementation ensures the overall speed-up increased to 20.59% by GEP based parallel HPRC in the execution unit of OR1200.

Keywords

GEP, Gene, Crossover, Mutation, CoreMark.

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R. Maheswari ¹, S. Rajeswari ¹

Affiliations
1 Department of Computer Science, Sree Saraswathi Thyagaraja College, Coimbatore-46, IN

Abstract

The effort of this article is regarding to detect jamming attacks in wireless networks. The Jamming detection and techniques have been proposed in the journalism. They established results by the authors are often CA and JADE as most of the jamming regions are closely marked, and they do not help to clearly differentiate jamming mechanisms. We explore a different jamming attack by discovering the relationship between five parameters. Packet delivery ratio, Total-message-size, Probability detection, Energy, End-To-End Delay and we are using JADE Method for indentifying malicious node. This proposed system used to find out the jamming attack by JADE Method and we used to protect our data by using Multi Key Generation algorithm. Jamming Attack Detection based on Estimation (JADE) scheme and establishes the hacker. Multi Key Generation techniques have been proposed in the journalism and it will be explained using through the encryption and decryption multiple key pairs.

Keywords

Jamming Attacks, Types of Jamming Attacks, CA, JADE, and Multi Key Generation Algorithm.

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K. Bhuvana ¹, R. Gomathy ¹, R. Harini Devi ¹, M. Ishwariya ¹, R. Maheswari ¹

Affiliations
1 Department of ECE, Agni College of Technology, Chennai, IN

Abstract

The main objective of this project is to interface the nut runner machine in the tightening system with the master computer. Nut runner is a torque tightening machine. It is used to tighten the bolts which are very complex by manual tightening. By this interfacing, it can collect and store all the data from the machine including torque, angle, and status of the tightening bolts, in accordance with the engine number. For the interfacing purpose, it uses a hardware component called PROFIBUS. PROFIBUS is a process field bus it has a special feature that is, it can collect and store all the resultant data into the master computer. By using a software interface Win CC flexible and hardware interface SIMATIC net card and includes Visual basics to display all the data.

Keywords

PROFIBUS DP, Siemens SIMATIC S7 300, Win CC Flexible, Visual Basics Script, Nut Runner Tightening.

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