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Authors
Affiliations
1 Department of Applied Electronics, St. Joseph’s College of Engineering, Chennai-600119, Tamil Nadu, IN
2 Department of ECE, St. Joseph’s College of Engineering, Chennai-600119, Tamil Nadu, IN
3 Department of ECE, Anna University, Chennai-600025, Tamil Nadu, IN
Source
Indian Journal of Science and Technology, Vol 8, No 16 (2015), Pagination:
Abstract
Background/Objectives: Multilevel Inverters are growing technology, even there are many topologies available in real world, here new multilevel topologies such as diode clamped multilevel inverter and cascaded-H-bridge inverter are discussed and comparative results for lower total harmonic distortion are analysed. Methods/Statistical Analysis: Neutral point diode clamped inverter is analysed and its total harmonic distortion value is calculated. Cascaded H-Bridge (CHB) 7 level inverter is analysed and then simulated, finally it is verified using FPGA controller. Three H-bridges are seriously connected to produce 7 level output voltage, FPGA controller uses Sinusoidal Pulse Width Modulation (SPWM) to produce pulse pattern for H-bridges. Results: This topology is tested in Matlab/Simulink environment. Total Harmonic Distortion (T.H.D) value of 7 level voltages is seen as a 30.33%. Which is very low as compared with 3 phase diode clamped five level inverter (81.7%). Conclusion/Application: Solar Photo Voltaic system is employed to compete the disadvantages of conventional energy sources and resulted in energy conservation system that reduces power consumption.
Keywords
Cascaded H-Bridge, FPGA Controller, Multilevel Inverter, Sinusoidal Pulse Width Modulation, Total Harmonic Distortion
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