Informatics Publishing Limited

P. Kavithapandian ¹, S. Muthukumar ¹, Kannan Balasubramanian ²

Affiliations
1 Department of Computer Science & Engineering, Sree Sowdambika College of Engineering, Tamilnadu, IN
2 Department of Computer Science & Engineering, Mepco Schlenk Engineering College, Sivakasi, Tamilnadu, IN

Abstract

In this paper, we propose a novel, user-centric approach to DoS impact measurement. Our key insight is that DoS always causes degradation of service quality, and a metric that holistically captures a human user’s QoS perception will be applicable to all test scenarios. For each popular application, we specify its QoS requirements, consisting of relevant traffic measurements and corresponding thresholds that define good service ranges. We observe traffic as a collection of high-level tasks, called “transactions”. Each legitimate transaction is evaluated against its application’s QoS requirements; transactions that do not meet all the requirements are considered “failed". We aggregate information about transaction failure into several intuitive qualitative and quantitative composite metrics to expose the precise interaction of the DoS attack with the legitimate traffic. 

Keywords

Network-Level Security and Protection, Communication/Networking and Information Technology, Computer Systems Organization, Measurement Techniques, Performance of Systems.

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A. Vishnu Priya ¹, Kannan Balasubramanian ¹

Affiliations
1 Department of Computer Science and Engineering, Mepco Schlenk Engineering College, IN

Abstract

The evolution of interconnection network represents the dependency of the total system cost and power consumption. To achieve a better performance in High-speed network design, the number of components or resources must be reduced. This leads to a necessity of efficient congestion management technique. RECN (an efficient Head-of-Line blocking elimination technique) is a cost effective Switching architecture to face the challenges of congestion management, it has been recently proposed for Advanced Switching (AS). RECN detects the formation of congestion trees, dynamically allocates queues for storing congested packets, and thus eliminates the HOL blocking introduced by congestion trees. These queues are deallocated when congestion vanishes. In this paper, an enhanced RECN version, specifically distributed queue deallocation mechanism for RECN-IQ (Input queue switch architecture: only queues at input port of a switch) that reduces the number of required resources (Queues), reduces the memory requirement and does not require the use of control packets for the deallocation of SAQ’s (Set Aside Queues- dynamically assigned for congested points) are proposed. Here a new congestion notification mechanism, where flow control packets are used to notify congestion, is used. This simplifies the implementation of RECN-IQ deallocation strategies in AS. Regarding the performance it leads to a significant reduction of the data memory area required at each port in the reduction factor of 5 times than RECN-CIOQ (Combined Input Output Queue - have queues at both Input port & Output port of a switch) and avoids the use of explicit congestion notifications and token-exchanging packets .

Keywords

High-Speed Interconnection Networks, Congestion Management, Switching, Queueing.

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R. Ramathilagam ¹, Kannan Balasubramanian ²

Affiliations
1 Mepco Schlenk Engineering College, Sivakasi, IN
2 Department of Computer Science and Engineering, Mepco Schlenk Engineering College, Sivakasi, IN

Abstract

Packet switches are used in the Internet to forward information between a sender and receiver and are the critical bottleneck in the Internet. Without faster packet switch designs, the Internet cannot continue to scale-up to higher data rates. Packet switches must be able to achieve high throughput and low delay. In addition, they must be stable for all traffic loads, must efficiently support variable length packets, and must be scalable to higher link data rates and greater numbers of ports. Some unbalanced traffic loads result in instability for input queued (IQ) switches. Crossbars are main components of communication switches used to construct interconnection networks. Scheduling algorithms control contention in switch architecture. Several scheduling algorithms were proposed for input-queued crossbar switch architectures. This paper suggests a Critical Node Matching algorithm based on Maximum Node Containing matching (MNCM). This algorithm is the lowest complexity deterministic algorithm with good delay performance that delivers 100% throughput.

Keywords

Crossbars, Input-Queued Switches, Scheduling.

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N. Narayanan Prasanth ¹, Kannan Balasubramanian ², R. Chithra Devi ³

Affiliations
1 Department of Information Technology, National College of Engineering, IN
2 Department of Computer Science and Engineering, Mepco Schlenk Engineering College, IN
3 Department of Information Technology, Dr. Sivanthi Aditanar College of Engineering, IN

Abstract

Research in high speed switching systems is in greater demand as the internet traffic gets rapid increase. Designing an efficient scheduling algorithm with high throughput and low delay is an open challenge. Most of the algorithms achieve 100% throughput in uniform traffics but failed to attain the same performance under non-uniform traffics. Moreover these algorithms are also suffers from starvation leads to extended waiting time of VOQ. In this paper, Prioritized Queue with Round Robin Scheduler (PQRS) is proposed for Buffered Crossbar Switches. We proved that our proposed scheduler can achieve 85% throughput under any non-uniform traffic without starvation.

Keywords

Buffered Crossbar Switch, Delay Performance, Scheduling Algorithms, Starvation, Throughput.

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Kannan Balasubramanian ¹, C. Sindhu ¹

Affiliations
1 Department of Computer Science, Mepco Schlenk Engineering College, Sivakasi-05, IN

Abstract

Crossbars are an emerging technology in high speed router. In buffered crossbar switch a buffer is associated with each crossbar. Due to the introduction of crossbar buffers the input and output contentions are highly eliminated. Both the input and output port work independently and so the scheduling process is highly simplified. With a speed up of 2 it has been proved that 100% throughput can be achieved. In this paper we propose a 100% throughput scheduling algorithm without speedup called ISA. In ISA the scheduling decision is purely based on the state information of the local crosspoint buffer. So it is suited for a distributed implementation and it is highly scalable. The main advantage is the crosspoint use a buffer size of 1 which minimizes the hardware cost. Simulation results show that we achieve 100% throughput without any speedup.

Keywords

Buffered Crossbar Switch, Crosspoint Buffer, Input Queued, Output Queued, Speedup, Virtual Output Queue, 100% Throughput.

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