Informatics Publishing Limited

D. Agrawal ¹, T. K. Lahiri ¹, K. Sanjay ¹, S. Arvind ¹, P. Abhijot ¹

Affiliations
1 Dept of Cardiovascular and Thoracic Surgery, Institute of Medical Sciences, Banaras Hindu University, Varanasi 221005 Uttar Pradesh., IN

Abstract

The authors describe what is, to their knowledge a case of coexistence of ductus caroticus and ductus arteriosus along with tetralogy of Fallot. The ductus caroticus is manifested as low lying carotid artery origin at C6 vertebra. This is also associated with origin of the left common carotid artery from brachiocephalic artery and a 3 mm patent ductus arteriosus. A 15 month old male infant presented with cyanosis undergone a comprehensive work up with 2D Doppler echocardiography and multi detector computed tomography (MDCT) which has gained importance with supplementary role in the evaluation of patients with congenital heart disease. This unique anatomical anomaly caused by a disturbed pattern of aortic arch regression.

Keywords

Ductus Caroticus, Ductus Arteriosus, Tetralogy of Fallot, MDCT

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V. Kanagapriya ¹, S. Kavitha ¹, S. KarthiKeyan ¹, K. Sanjay ¹

Affiliations
1 Department of Electronics and Communication Engineering, Angel College of Engineering and Technology, Tirupur-641665, IN

Abstract

Error correction codes are commonly used to protect memories from soft errors, which change the logical value of memory cells without damaging the circuit. As technology scales, memory devices become larger and more powerful error correction codes are needed. Majority logic decoding is efficient technique due to their capability to correct multi number of errors, less time and area consumption. The proposed error-detection and correction is achieved by using 2D parity check, checksum, CRC methods with majority logic decoding. This proposed method is more efficient than the existing method as it reduces the memory access time when there is no error in the data read. This proposed technique is implemented by using Xilinx design suite 12.1.

Keywords

Low Density Parity Check, Different Set Codes, Error Correction Codes, Majority Logic Decoding.

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