A B C D E F G H I J K L M N O P Q R S T U V W X Y Z All
Jayasudha, J.
- Self Service Mesh Router for Wireless Mesh Network with Missed Workstation Detection
Authors
1 Department of Computer Applications, Nandha Engineering College, Perundurai, Erode, Tamilnadu, IN
Source
Networking and Communication Engineering, Vol 7, No 9 (2015), Pagination: 373-377Abstract
The term Mobile ad hoc networks (MANETs) are ultimate for a permanent framework which is busy or impracticable. Now a days, network partitioning affect MANETs. This drawback makes MANETs inappropriate for applications such as administration and combat zone connections, in which group fellows might have to toil in factions dispersed in the application territory. There will be critical intergroup communication to the team cooperation in such applications. This limitation is labeled by introducing Autonomous Mobile Mesh Network (AMMNET), a new class of ad-hoc network. The cell phone mesh nodes of an AMMNET are skilled of following the mesh patrons in the application territory, and arranging themselves into a proper network topology to make sure that mutually intra and inter faction have high-quality connectivity for interactions than usual mesh networks. A circulated client tracking key, to compact with the vibrant nature of client mobility, and current techniques for vibrant topology revision in accord with the mobility model of the clients is recommended. The outcomes of our recreation, point out that AMMNET is strong against network divisioning and talented of providing lofty relay throughput for the mobile patrons. Indicator Terms- Cell phone Mesh Networks, Vibrant Topology Consumption, and Patron Tracking.
Keywords
Autonomous Mobile Mesh Networks (AMMNET), Mobile Ad hoc Networks (MANETs), Delay Tolerant Network (DTN), Radio-Frequency Identification(RFID), Long Term Evolution (LTE).
- Analysis of Current Mode Logic High Speed CMOS Technology
Authors
1 Department of ECE, Tejaa Shakthi Institute of Technology for Women, Coimbatore, Tamilnadu-641659, IN
Source
Biometrics and Bioinformatics, Vol 10, No 2 (2018), Pagination: 34-36Abstract
We have designed D-latch circuit which is suitable for nanometer technology. The circuit is low-voltage and also high speed. Here we are using Current Mode Logic (CML) technique. This technology is used for improve the speed of the D-latch circuit. We are comparing a two-stage frequency divider designed using both the triple-tail DFF and the proposed folded DFF. During the simulation minimum delay was obtained with the help of proposed folded DFF and it consumes the less amount of power. The delay is reduced and the speed is improved. In the DFF, the maximum operating frequency is achieved over a triple- tail DFF. The simulation is done using cadence virtuoso tool.
Keywords
Current Mode Logic (CML), D–Latch, D–FlipFlop (DFF), Nanometer CMOS.References
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- ASIC Implementation of Efficient Error Detection for Floating Point Addition
Authors
1 Department of ECE, Tejaa Shakthi Institute of Technology for Women, Coimbatore, IN