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Authors
Affiliations
1 Dept. of ECE, KL University, Vijayawada, AP, IN
2 Dept. of ECE, JNTUH, Hyderabad, AP, IN
Source
AIRCC's International Journal of Computer Science and Information Technology, Vol 3, No 3 (2011), Pagination: 63-72
Abstract
As with the increase in data density the probability of error happening in data transfer has increased the need for error free coding technique is in greater demand. In this paper an optimal approach for the processing of self correcting logic in faulty condition during coding and decoding operation is developed. The process of digital designing and its evaluation for realization is presented. The implementation of proposed design on Xilinx-FPGA device is presented.
Keywords
Error Free Coding, Memory Operation, Self Correcting Logic, Forward Error Correction.
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