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Christober Asir Rajan, C.
- Harmonic Elimination Using Switching Frequency in H-bridge Cascaded Multilevel Inverter
Abstract Views :183 |
PDF Views:3
Authors
Affiliations
1 Department of Electrical and Electronics Engineering, Vel Tech DR.RR&DR.SR Technical University, Avadi, Chennai–600 062, IN
2 Department of Electrical and Electronics Engineering, Pondicherry Engineering College, Puducherry–605014, IN
1 Department of Electrical and Electronics Engineering, Vel Tech DR.RR&DR.SR Technical University, Avadi, Chennai–600 062, IN
2 Department of Electrical and Electronics Engineering, Pondicherry Engineering College, Puducherry–605014, IN
Source
Programmable Device Circuits and Systems, Vol 5, No 7 (2013), Pagination: 311-315Abstract
This paper presents harmonics elimination in H-bridge Multi-Level Inverter. The basic concept of this reduction is to eliminate harmonics in different level with an appropriate choice of switching angles. This paper employs Homotopy algorithm to solve the transcendental equations for finding the switching angles. This method solves the nonlinear transcendental equations. In order achieve a wide range of modulation indices with minimize total harmonics distortion (THD) in particularly third, five and seven level. It is much simpler formulation without complex analytical calculations for any number of voltage levels. It has several informative simulation results verify the validity and effectiveness of the proposed algorithm using MATLAB/SIMULINK.Keywords
Multilevel Inverter, Harmonic Elimination, Homotopy Algorithm, MATLAB/SIMULINK.- Identification and Location of FACTS Devices in Fourteen Bus System Using Matlab/Simulink
Abstract Views :241 |
PDF Views:3
Authors
Affiliations
1 Department of EEE, JNTUH, Hyderabad, IN
2 Department of EEE, Pondicherry Engineering College, Puducherry, IN
1 Department of EEE, JNTUH, Hyderabad, IN
2 Department of EEE, Pondicherry Engineering College, Puducherry, IN
Source
Automation and Autonomous Systems, Vol 4, No 6 (2012), Pagination: 253-257Abstract
This paper deals with the modeling and simulation of location of FACTs devices in 14-bus system. Fixed Capacitor Thyristor- Controlled Reactor (FC-TCR), Thyristor-Controlled Series Compensator (TCSC) and Unified Power Flow Controller (UPFC) are included in 14-bus system to improve the bus voltages and powers. The voltage sag is created by adding an extra load at the receiving end. This voltage sag is compensated by using FACTS devices like SVC using FC-TCR, TCSC and UPFC. Improvement in the voltage and power are studied using simulation results.