Informatics Publishing Limited

Ahmed Sherif Zekri ¹

Affiliations
1 Department of Mathematics and Computer Science, Beirut Arab University, P.O. Box 115020, Riad El Solh, 11072809 Beirut, LB

Abstract

Performance of applications executed on multi-core processors is not boosted by just dividing the work among a team of threads and assigning them blindly to the CPU cores. Factors such as data access patterns in memory, the way of allocating the threads to the physical cores, and how the data are partitioned among the threads significantly affect performance. In this paper, we target the acceleration of the Sobel image gradient computing which is important in segmenting images for further processing in computer vision and image analysis applications. We present a multi-threaded algorithm using the standard OpenMP threading library to parallelize the computations using two Intel multi-core processors. The effects of the parallelization factors on the performance of the proposed algorithm are evaluated using different image resolutions to draw accurate conclusions. Our results showed a maximum attained speedup closer to the number of physical cores in the CPU, which is the maximum theoretical value.

Keywords

Sobel Filter, Algorithm Parallelization, Openmp Threading Library, Static Loop Scheduling, Image Partitioning.

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Ahmed Sherif Zekri ¹

Affiliations
1 Department of Mathematics and Computer Science, Alexandria University, EG

Abstract

General-purpose microprocessors are augmented with short-vector instruction extensions in order to simultaneously process more than one data element using the same operation. This type of parallelism is known as data-parallel processing. Many scientific, engineering, and signal processing applications can be formulated as matrix operations. Therefore, accelerating these kernel operations on microprocessors, which are the building blocks or large high-performance computing systems, will definitely boost the performance of the aforementioned applications. In this paper, we consider the acceleration of the matrix transpose operation using the 256-bit Intel advanced vector extension (AVX) instructions. We present a novel vector-based matrix transpose algorithm and its optimized implementation using AVX instructions. The experimental results on Intel Core i7 processor demonstrates a 2.83 speedup over the standard sequential implementation, and a maximum of 1.53 speedup over the GCC library implementation. When the transpose is combined with matrix addition to compute the matrix update, B + A^T, where A and B are squared matrices, the speedup of our implementation over the sequential algorithm increased to 3.19.

Keywords

Matrix Transpose, Vector Instructions, Streaming and Advanced Vector Extensions, Data-Parallel Computations.

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