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Ahmad, Afaq
- Design of a Gray Encoder and Counter Using D-FFs and MUXs
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Authors
Affiliations
1 Department of Electrical and Computer Engineering, College of Engineering, Sultan Qaboos University, OM
2 Department of Communications and Computers, Helwan University, EG
1 Department of Electrical and Computer Engineering, College of Engineering, Sultan Qaboos University, OM
2 Department of Communications and Computers, Helwan University, EG
Source
Oriental Journal of Computer Science and Technology, Vol 10, No 3 (2017), Pagination: 539-548Abstract
This paper proposes a novel design for Binary to Gray code encoders and/or counters using multiplexers and flip-flops. The proposed design are modular based, whereby other stages can be added as per the requirement of the desired applications. Moreover, the external clock timing signal drives only the first stage, while all remaining stages are linked to the outputs from preceding stages. The successive stages transitions at half the rate of the preceding stage thereby, makes the design power efficient since the dissipated power is quadratic frequency dependent. The proposed design can be modified to increase the counters duration or increase the counters resolution according to the applications need. Increasing the Gray counters time span by powers of two simply necessitates augmenting the design by more stages, while maintaining a constant clock rate. On the other hand, doubling the time resolution of the Gray counter over a constant time span can be achieved by adding another stage while subsequently doubling the clock rate.Keywords
Gray Code, Reflected Binary Code, Encoder, Counter, D-FF.References
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- F. G. Heath, “Origins of the binary code,” Scientific American, vol. 227(2), p.76, August 1972.
- A. Ahmad, and A. Al-Maashri, “Design and analysis of newly innovated set of binary code-words of unitary Hamming distance,” Proceedings IEEE international conference on communication, computer and power (ICCCP’07), Muscat, Oman, pp.162-168, Feb. 19-21, 2007
- T. N. Kwan, S. Chen, F. Boussaid and A. Bermak, “Compact Gray-code counter/memory circuits for spiking pixels,” Proceedings Fourth IEEE International Symposium on Electronic Design, Test and Applications-DELTA 2008, Hong Kong, SAR, China, pp.506-511, 23-25 January 2008.
- S.V. Yarmolik and V.N. Yarmolik, “Modified Gray and counter sequences for memory test address generation,” Proceedings of the International Conference, Mixed Design of Integrated Circuits and System, (MIXDES 2006), pp.572-576, 2006.
- H. Mehta, R. M. Owens and M. J. Irwin, “Some issues in Gray code addressing,” Proceedings of the 6th Great Lakes Symposium on VLSI, pp 178-181, 22-23 Mar 1996.
- C. L. Su, C. Y. Tsui and A. Despain, “Saving power in the control path of embedded processors,” Proceedings of IEEE Design and Test of Computers, pp. 24-31, 1994.
- C. L. Su,M. Alvinand A. Despain, “Cache design trade-offs for power and performance optimization: A Case Study. ISLPD, pp. 63-68,1995.
- A. Maheshwari, W. Burleson and T. Russell, “Trading off reliability and power consumption in ultra-low power systems,”Proceedings International Symposium on Quality Electronic Design, pp. 361-366, 2002.
- R.Hakenes andY. A.Manoli, “Segmented gray code for low-power microcontroller address buses,” Proceedings of 25th EUROMICRO Conference, .Vol.1, pp. 240-243, 1999.
- A. Ahmad, D. Ruelens, M. H. A. Awadalla and S. Ahmad, “An optimized technique for machine state reduction,” The Third International Conference on Numerical Analysis and Optimization NAOiii-2014, held at Sultan Qaboos University, Oman, January 5-9, 2014, Book Program & Abstracts, p. 36.
- S. Kundu, K.S.Krishna and S. Chattopadhyay, “Test pattern selection and customization targeting reduced dynamic and leakage power consumption,” Proceedings Asian Test Symposium., CD-ROM Proceedings, November 2009.
- S. Kundu and S. Chattopadhyay, “Scan-chain masking technique for low power circuit testing,” Proceeding of ASQED 2009, pp. 183-188
- M.V. Rao, N. S. Sravaniand S. P. V. A. Brahmanandam, “Self-test techniques in SoC for low power consumption,” Int. J. Comp. Tech. Appl., vol.2(6), pp.1903-1906, 2011
- N. Gupta, “Reduce SoC power use without high level EDA tools,” EE Times-Asia, pp. 1-4, 2013.
- A.Ahmad, “Another Perspective in Generation and using of Gray Code-words”, Journal of Electrical Engineering, IEEE Malaysia, (ELEKTRIKA), vol.9(2), pp.49-55, 2007.
- A. Ahmad, and M. M. Bait Suwailam, “Design of an efficient and less memory requiring algorithmic procedure for computing Gray codes,” Proceedings IEEE international conference on communication, computer and power (.ICCCP’07), Muscat, Oman, pp.172-176, Feb. 19-21, 2007.
- A. Ahmadand M. M. Bait Suwailam, “A less complex algorithmic procedure for computing Gray codes,” The Journal of Engineering Research, vol.6(2), pp.12-19, 2009.
- A. Ahmad and F. Bait-Shiginah, “A nonconventional approach to generating efficient binary Gray code sequences,” IEEE Potentials, vol.31(3), pp.16-19, 2012.
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- Use of Mathematical Morphology in Vehicle Plate Detection
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Authors
Neeraja Mohanan
1,
Afaq Ahmad
1,
Sayyid Samir Al-Busaidi
1,
Lazhar Khiriji Amir Abdulghani
1,
Muhammad Al Nadabi
1
Affiliations
1 Department of Electrical and Computer Engineering, Sultan Qaboos University, PO Box 33, Zip code 123, Muscat, OM
1 Department of Electrical and Computer Engineering, Sultan Qaboos University, PO Box 33, Zip code 123, Muscat, OM
Source
Oriental Journal of Computer Science and Technology, Vol 11, No 4 (2018), Pagination: 195-200Abstract
In the past couple of decades, the number of vehicles has increased radically. A statistic which presents the number of cars sold worldwide from 1990 through 2017, forecasts for 2018, some 81.6 million automobiles are expected to be sold by the end 2018. With this continuous increase, it is becoming very tedious to keep track of each vehicle for the purpose of security, law enforcement and traffic management. This phenomenon of rapidly increasing vehicles on the road highlights the importance for a vehicle number plate recognition system. By recognizing the car plates, the drivers of the vehicle can be identified from the database. Number plate detection system are used in various applications like traffic law maintenance, traffic control, automatic toll collection, parking systems, automatic gate openers. This paper presents a unique algorithmic procedure for detecting vehicle plate number which is based on the concept of mathematical morphology. The developed algorithm is simple, efficient and flexible. The algorithm is capable of working satisfactorily even in different constraints such as like rain, smoke and shadow. This user-friendly software tool is developed on MATLAB platform which is one of the common and efficient image processing analysis tools.Keywords
Image Processing, Mathematical Morphology, Set Theory, Vehicle Number Plate Recognition, Algorithm, MATLAB.References
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- Cris, L.; Structure Characterization Using Mathematical Morphology, Project Report, Delft University of Technology, January 2004.
- Sreedhar, K.; Panlal, B. Enhancement of images using morphological transformations, International Journal of Computer Science & Information Technology, Volume 4 (1), 2012, pp. 33-50.
- Mugdha, A. R.; Fast Morphological Image Processing on GPU Using CUDA, College of Engineering, Pune, Dissertation 2013.
- Vakken, Chapter 6, Mathematical Morphology, pp. 121-162.(Accessed on December 16, 2018) http://www.cs.uu.nl/docs/vakken/ibv/reader/chapter6.pdf
- Owens, R. Mathematical morphology, computer vision lectures. (Accessed on December 16, 2018) http://homepages.inf.ed.ac.uk/rbf/CVonline/LOCAL_COPIES/OWENS/LECT3/node3.html
- Sai, K. P. Automatic number plate recognition by using MATLAB, International Journal of Innovative Research in Electronics and Communications, Volume 2 (4), 2015, pp. 1-7.
- Jayanta, K. B.; Debnath, B.; Tai-hoon, K. Use of artificial neural network in pattern recognition, International Journal of Software Engineering and Its Applications, Volume 4 (2), 2010, pp. 23-34.
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- Muhammad, F. H.; Puteh, S.; Mohammad, R. M. J.; Shahrul, N. Y. A Face recognition system using template matching and neural network classifier, In Proceedings: 1st International Workshop on Artificial Life and Robotics, Kolej Universiti Kejuruteraan Utara Malaysia, 2005, pp. 1-6. ISBN: 9834272413, 9789834272418.
- Neeraja, M.; Afaq A.; Amir, A.; Muhammed A.; Lazhar K.; Samir A. A brief description of pattern recognition techniques, Imperial Journal of Interdisciplinary Research, Volume 2 (8), 2016, pp. 717-72.
- Suitability of OFDM in 5G Waveform-A Review
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Authors
Affiliations
1 Department of Electronics and Communication Engineering, Koneru Lakshmaiah University, Vijayawada 522502, IN
2 Department of Electrical and Computer Engineering, Sultan Qaboos University, Muscat, Box 33, Zip code 123, OM
1 Department of Electronics and Communication Engineering, Koneru Lakshmaiah University, Vijayawada 522502, IN
2 Department of Electrical and Computer Engineering, Sultan Qaboos University, Muscat, Box 33, Zip code 123, OM
Source
Oriental Journal of Computer Science and Technology, Vol 12, No 3 (2019), Pagination: 66-75Abstract
Systematic pursuits are being developed to set forth the framework for the Fifth Generation (5G) wireless standards. This paper emphases on the most extensively deployed technology - Orthogonal Frequency Division Multiplexing (OFDM) that has outpaced other waveform aspirants for Fourth Generation (4G) communication standards. Irrespective of the beneficial features, it does possess a number of significant limitations that mark it as an incompatible candidate for the upcoming 5G standard. This paper highlights on its major drawback i.e high Peak-to-Average Power Ratio (PAPR). Results state that PAPR does cause sudden upsurge to the output signal envelope causing further other damages. There exists a need for more flexible waveforms to replace the conventional OFDM in order to address the unprecedented challenges. The future research directions in the domain are presented.Keywords
Communication, Multi-carrier, OFDM, Orthogonal Frequency Division Multiplexing, PAPR, Peak to Average Power Ratio, Wireless Technology, 5G.References
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- Elgawi, O; Mutawa, A. M.; Ahmad, A. EnergyEfficient Embedded Inference Of Svms On FPGA, IEEE Computer Society Annual Symposium On VLSI, To Be Held At Miami, Florida, USA, 15-17 July 2019, Pp. 1 - 5.
- Ahmad, A. (Keynote/Invited – Talk). Reliable And Fault Tolerant Systems On Chip Through Design For Testability”, IEEE Conference: 2019 Amity International Conference On Artificial Intelligence – (AICAI’19), Amity University, Int’l Academic City, Dubai, UAE, Feb. 4 - 7, 2019, Pp. 50 - 53.
- Ahmad, A. (Keynote/Invited – Talk). Challenges For Test And Fault-Tolerance Due To Convergence Of Electronics, Semiconductor Systems And Computing, IEEE Conference: 2017 International Conference On Infocom Technologies And Unmanned Systems (Trends And Future Directions) (ICTUS), Amity University, Int’l Academic City, Dubai, UAE, 18 - 20 Dec. 2017, Pp. 64 - 68.
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- Handover Latency and Interoperability in Future Generation Wireless Mobile Heterogeneous Environment
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Authors
Affiliations
1 Department of Electronics and Communication Middle East College, PO Box 79, Zip Code 124 Muscat, OM
2 Department of Electrical and Computer Engineering, Sultan Qaboos University, PO Box 33, Zip Code 123, Muscat, Sultanate of Oman, OM
1 Department of Electronics and Communication Middle East College, PO Box 79, Zip Code 124 Muscat, OM
2 Department of Electrical and Computer Engineering, Sultan Qaboos University, PO Box 33, Zip Code 123, Muscat, Sultanate of Oman, OM
Source
Oriental Journal of Computer Science and Technology, Vol 13, No 2,3 (2020), Pagination: 72-77Abstract
Continuous striving in the development of wireless mobile networks maximizes the possibility of user services and provides experience context rich and personalized services. In this way, for the development towards fully integrated 4G-all IP network architecture, the interoperability between future generation wireless networks and seamless vertical handover (VHO) has become a crucially important issue. The proposed work is mainly focusing on exploring interoperability issues in heterogeneous networks considering development towards 4G and emphasizing one merging IEEE 802.21 standard. Further, Simulation results were presented to showcase vertical handover (VHO) performance using IEEE 802.21. Simulation Analysis is done using Network Simulator (NS-2) with seamless mobility package extension.Keywords
4G; 4G-all IP Architecture; IEEE 802.21; Interoperability; Vertical Handover (VHO).References
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- Lavanya P., Satyanarayana P. and Ahmad A. Suitability of OFDM in 5G Waveform – A Review, Oriental Journal of Computer Science and Technology, vol. 12, no. 3, 2019, pp. 66-75.
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