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Acceleration of Stochastic Algorithm on FPGA System


Affiliations
1 Dept of Electrical & Electronics Engineering, Chennai, India
 

This project is designed to implement a stochastic algorithm on an FPGA system to accelerate a biological simulation. A fast national disease spread prediction algorithm is needed to anticipate the tendency of an infectious disease to spread in a given geography. Using a traditional computing system, the simulation would require large execution time as the model size grows. The project explores methods for implementing such an algorithm on an FPGA system. By utilizing the parallel features of an FPGA, we may find a way to run the whole simulation in real time. In this project, a MATLAB simulation is firstly designed for a hardware compatible algorithm for an SIR model, which is a basic disease spread model. Then, three kinds of FPGAs are used to implement the algorithm. Finally, some verification is applied to validate the result. The project has successfully implemented a hardware compatible algorithm for an SIR model on an FPGA system.

Keywords

Stochastic Algorithm, FPGA System, SIR Model.
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  • Acceleration of Stochastic Algorithm on FPGA System

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Authors

J. Sheela Arokia Mary
Dept of Electrical & Electronics Engineering, Chennai, India

Abstract


This project is designed to implement a stochastic algorithm on an FPGA system to accelerate a biological simulation. A fast national disease spread prediction algorithm is needed to anticipate the tendency of an infectious disease to spread in a given geography. Using a traditional computing system, the simulation would require large execution time as the model size grows. The project explores methods for implementing such an algorithm on an FPGA system. By utilizing the parallel features of an FPGA, we may find a way to run the whole simulation in real time. In this project, a MATLAB simulation is firstly designed for a hardware compatible algorithm for an SIR model, which is a basic disease spread model. Then, three kinds of FPGAs are used to implement the algorithm. Finally, some verification is applied to validate the result. The project has successfully implemented a hardware compatible algorithm for an SIR model on an FPGA system.

Keywords


Stochastic Algorithm, FPGA System, SIR Model.