International Journal of Scientific Engineering and Technology

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Effective and Efficient Optimization in RC4 Stream


Affiliations
1 Sembodai Rukmani Varatharajan Enginnering College, Sembodai, Tamilnadu, India
 

At present technology, power saving technique is one of the important criteria while designing a hardware for RC4 stream cipher. So this paper proposes a BCD to Excess-3-adder to build an efficient hardware with parallel processing system for low power consumption without compromising the speed and security in cryptography. Loop unrolling and Pipeline concepts are used for expeditious hardware implementation. This design is realized on XC3S100E FPGA with VHDL language.

Keywords

BCD to Excess-3-Adder, Cryptography, Loop Unrolling, Pipelining, RC4, Stream Cipher.
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  • Effective and Efficient Optimization in RC4 Stream

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Authors

N. Sivasankari
Sembodai Rukmani Varatharajan Enginnering College, Sembodai, Tamilnadu, India
A. Yogananth
Sembodai Rukmani Varatharajan Enginnering College, Sembodai, Tamilnadu, India

Abstract


At present technology, power saving technique is one of the important criteria while designing a hardware for RC4 stream cipher. So this paper proposes a BCD to Excess-3-adder to build an efficient hardware with parallel processing system for low power consumption without compromising the speed and security in cryptography. Loop unrolling and Pipeline concepts are used for expeditious hardware implementation. This design is realized on XC3S100E FPGA with VHDL language.

Keywords


BCD to Excess-3-Adder, Cryptography, Loop Unrolling, Pipelining, RC4, Stream Cipher.