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Prajapati, Pankaj P.
- Meta Heuristic Optimization Approach for CMOS Based Analog Circuit Design and Performance Evaluation of Evolutionary Algorithms
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Authors
Affiliations
1 Department of Electronics and Communication Engineering, Gujarat Technological University, IN
2 Department of Electronics and Communication Engineering, L D College of Engineering, IN
1 Department of Electronics and Communication Engineering, Gujarat Technological University, IN
2 Department of Electronics and Communication Engineering, L D College of Engineering, IN
Source
ICTACT Journal on Soft Computing, Vol 13, No 2 (2023), Pagination: 2827-2841Abstract
Manual design of Complementary Metal Oxide Semiconductor (CMOS) based analog circuit design becomes more challenging and tedious task due to very complex physical models and variation in the fabrication process as technology scale down. In this continuously changing era, the demand of mixed signal System on Chip (SoC) increasing day by day which digital and analog circuits integrated on same silicon chip. For the digital circuit design, many mature computer based automated tools have been established and limited research efforts made towards automization of the analog circuit design. This gap opens the ample research space for the researcher in the field of analog circuit design. Automization of analog circuit design makes the mixed signal SoC is the best approach to cope up with this problem, cost considerations and the time to market. This motivates the analog circuit designer to explore more automated computer aided tools in the field of analog circuit design. In this review paper, performance evaluation of various evolutionary algorithms is compared. The comparison includes most used Differential Evolution (DE) algorithm, Cuckoo Search (CS) algorithm, Particle Swarm Optimization (PSO) algorithm, hybrid CSPSO algorithm. The performance evaluations of these algorithms are compared with the different standard benchmark functions and the convergence graphs of these standard benchmark functions are compared to test number of runs with respect to number of iterations.Keywords
Automation of Analog Circuit Design, Optimization, DE Algorithm, PSO Algorithm, Hybrid CSPSO
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