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Kumar, Deepak
- Trap Charges Induced Immunity in Dual Metal Gate (DMG) Junctionless Accumulation Mode (JAM) Nanowire FET (NWFET)
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Authors
Affiliations
1 Department of Electronics and Communication Engineering, Maharshi Dayanand University, IN
1 Department of Electronics and Communication Engineering, Maharshi Dayanand University, IN
Source
ICTACT Journal on Microelectronics, Vol 7, No 3 (2021), Pagination: 1209-1215Abstract
In this brief, we have done a comparative study of Single Metal Gate Junctionless Accumulation Mode Nanowire FET (SMG-JAM-NWFET) and Dual Metal Gate Junctionless Accumulation Mode Nanowire FET (DMG-JAM-NWFET) for their immunity against the trap induced charges. It is so found that the DMG-JAM-NWFET poses much higher immunity against the trap charges as compared to the conventional SMG-JAM-NWFET in terms of much lower change in the potential, current, transconductance and output conductance. Aberration in other parameters like drain characteristics, Subthreshold Slope, capacitances and cut-off frequency has also been studied deeply. It is so found that the DMG-JAM-NWFET poses much higher immunity against the trap charges as compared to the conventional SMG-JAM-NWFET in terms of much lower change in the aforesaid parameters. It is so because of the impact ionization effect, the resistance to trap charges in DMG-JAM-NWFET is much higher than SMG-JAM-NWFET.Keywords
Immunity, Trap Charges, Junctionless Accumulation Mode, Drain Current, Transconductance Nanowire FET.
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