ICTACT Journal on Image and Video Processing

G. Nagendra Babu ¹, Ganapathi Hegde ¹, Pukh Raj Vaya ¹

Affiliations
1 Department of Electronics and Communication Engineering, Amrita Vishwa Vidyapeetham, IN

Abstract

Demand for High Speed&Low Power Architecture for Image/Video Compression Algorithms are increasing with scaling in VLSI Technology many Architectures in the Discrete Wavelet Transform (DWT) System have been proposed. This Paper surveys the different designed DWT's using Systolic Array Architectures and the Architectures are classified based on the application whether it is 1-D, 2-D or 3-D. This paper presents the overview of the architectures based on latency, number of MAC's, memory used, hardware efficiency etc. and this paper will give an insight to the reader on advantages and disadvantages of the design that are to be used in various applications.

Keywords

Systolic Array Architecture, DWT, Image and Video Processing.

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