Programmable Device Circuits and Systems

Jyoti Kedia ¹, Neena Gupta ¹

Affiliations
1 PEC University of Technology, Chandigarh, IN

Abstract

With scaling technologies ranging from 180 nm to 35 nm the magnitude of interconnects problem has increased manifold. The global wires are much more affected as compared to the local and semi global interconnects. In this paper the high performance interconnects has been investigated. The effect of scaling of dimensions on interconnection in VLSICs has been examined. The comparison of underlying physics of electrical and optical interconnects has been done along with the requirements of optical devices for optics to solve the problems of interconnects in future.

Keywords

Scaling, Copper Interconnects, Low K Dielectrics, Optical Interconnects.

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Neena Gupta ¹, Divya Dhawan ¹, Kadam Bhambri ¹, Gagandeep Kaur Jayjee ¹

Affiliations
1 PEC University of Technology, Sector 12-A, Chandigarh, IN

Abstract

The authors have developed, simulated and analyzed the performance of SOA-based all-optical OR and NOT gates at 10 Gbps. Furthermore, the all-optical NOR gate has been designed and its implementation has been done successfully by cascading OR with NOT gate. The proposed design is simpler in structure and offers flexibility in wavelength selection. Also, it allows scope for photonic integration which is imperative to realize higher level components like half-adder, full-adder etc. In comparison to previously postulated works, SOA based gates offer wide bandwidth and simplicity in structure. Also, majority of the designs in literature work upto 10 Gbps. However, the proposed design of OR, NOT and NOR gates can be operated upto 30 Gbps.

Keywords

All-Optical Gates (OR, NOT, NOR), Cross Gain Modulation (XGM), Cross Phase Modulation (XPM), Semiconductor Optical Amplifiers (SOAs).

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