Refine your search
Collections
Co-Authors
Year
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z All
Nagmode, Manoj S.
- A Review:High Speed Low Power Flash ADC
Abstract Views :144 |
PDF Views:3
Authors
Affiliations
1 Department of Electronics & Telecommunication, MIT College of Engineering, Pune, Maharashtra, IN
1 Department of Electronics & Telecommunication, MIT College of Engineering, Pune, Maharashtra, IN
Source
Programmable Device Circuits and Systems, Vol 7, No 4 (2015), Pagination: 99-102Abstract
In computerized world, The Speed, area and power are critical variables for high velocity applications. ADC is a mixed signal system that changes over the analog signals to the digital signals for transforming the data. In present day CMOS innovation the flash ADC is composed by utilizing the dynamic method, it fundamentally diminishes the power, voltage and delay. A flash ADC is extremely valuable for fastest speed when it is contrasted with the other ADC architectures. ADC is attempting to contrast the simple information with an arrangement of levels. In digital signal processors it is persistently challenge analog designer to enhance and grow new ADC architectures.