Programmable Device Circuits and Systems

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A Novel Optimization Technique for Multi-Domain Clock Skew Scheduling


Affiliations
1 Department of Electronics and Communication, Karunya University, Coimbatore 641114, TamilNadu, India
2 Government College of Technology, Tirunelveli, Tamilnadu, India
     

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The application of general clock skew scheduling is practically limited due to the difficulties in implementing a wide spectrum of dedicated clock delays in a reliable manner. This results in a significant limitation of the optimization potential. As an alternative the application of multiple clocking domains with dedicated clock buffer will be implemented. In this paper, an algorithm for determining the minimum number of clock domains to be used for multi domain clock skew scheduling is presented. The experimental results show the optimized clock period, dynamic power consumption implemented on the traffic light controller.

Keywords

Clock Skew Domain, Clock Skew Scheduling (CSS) Low Power VLSI, Synopsys Design Compiler.
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  • A Novel Optimization Technique for Multi-Domain Clock Skew Scheduling

Abstract Views: 144  |  PDF Views: 4

Authors

I. Flavia Princess Nesamani
Department of Electronics and Communication, Karunya University, Coimbatore 641114, TamilNadu, India
K. Mariya Priyadarshini
Department of Electronics and Communication, Karunya University, Coimbatore 641114, TamilNadu, India
J. Kanaka Deva Princy
Department of Electronics and Communication, Karunya University, Coimbatore 641114, TamilNadu, India
V. Lakshmi Prabha
Government College of Technology, Tirunelveli, Tamilnadu, India

Abstract


The application of general clock skew scheduling is practically limited due to the difficulties in implementing a wide spectrum of dedicated clock delays in a reliable manner. This results in a significant limitation of the optimization potential. As an alternative the application of multiple clocking domains with dedicated clock buffer will be implemented. In this paper, an algorithm for determining the minimum number of clock domains to be used for multi domain clock skew scheduling is presented. The experimental results show the optimized clock period, dynamic power consumption implemented on the traffic light controller.

Keywords


Clock Skew Domain, Clock Skew Scheduling (CSS) Low Power VLSI, Synopsys Design Compiler.