Digital Signal Processing

N. Vinodhkumar ¹, K. K. Nagarajan ¹, R. Srinivasan ²

Affiliations
1 Department of Information Technology, SSN College of Engineering, Kalavakkam-603110, Chennai, IN
2 Department of Information Technology SSN College of Engineering, Kalavakkam-603110, Chennai, IN

Abstract

The effect of gate-drain/source underlap (Lun) on a narrow band LNA performance has been studied in 30 nm FinFET using device and mixed mode simulations. LNA circuit with two transistors in a cascode arrangement is constructed and the input impedance, gain and noise-figure have been used as performance metrics. To get the better noise performance and gain, Lun in the range of 3-5nm is recommended.

Keywords

FinFET, Ft, Gm, Lun, LNA.

Full Text

     

K. R. Vishnupriya ¹, B. Lakshmi ², R. Srinivasan ²

Affiliations
1 Department of Information Technology in SSN College of Engineering, Kalavakkam – 603 110, Chennai, Tamilnadu, IN
2 Department of Information Technology in SSN College of Engineering, Kalavakkam – 603 110, Chennai, Tamilnadu, IN

Abstract

This paper investigates the effect of process variations on unity gain frequency (ft) in 30 nm gate length FinFET by performing extensive TCAD simulations. Six different geometrical parameters, channel doping, source/drain doping and gate electrode work function are studied for their sensitivity on ft. It is found that ft is more sensitive to gate length, underlap, gate-oxide thickness and SD doping and less sensitive to source/drain width and length, and work function variations.

Keywords

f_t, FinFET, Scaling, Process Variations.

Full Text