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Singh, Sumit
- Robust Study and Design of a Low Power CMOS CSVCO using 45nm Technology
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Authors
Affiliations
1 Department of Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi, IN
2 Department of Electronics and Communication Engineering, MMMUT Gorakhpur (UP), IN
1 Department of Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi, IN
2 Department of Electronics and Communication Engineering, MMMUT Gorakhpur (UP), IN
Source
Indian Journal of Science and Technology, Vol 9, No 44 (2016), Pagination:Abstract
This paper consist of the design and detailed study of a three stage Current Starved Voltage Controlled Oscillator having a very low voltage supply of 1V with low phase noise. The Three stage CSVCO is designed. This work is being done on Cadence virtuoso analog and digital IC design tools with gpdk 45nm CMOS technology process. The voltage supply is taken to be 1V which is low and quite useful according to the latest trends. The center frequency is taken to be 2.4 GHz which is best suitable for satellite and many other applications. The proposed CSVCO consumes low power, low area, low phase noise and high oscillation frequency. The design procedure adopted and the simulation results acquired are illustrated. This CSVCO is suitable for a fast locking PLL, for frequency synthesizer, for clock generation and recovery etc. The results obtained are compared with the previous works and improvements are observed. The Phase noise of the proposed CSVCO is less as compared to the other works.Keywords
CMOSFET (Complementary Metal Oxide Semiconductor Field Effect Transistor); CSVCO(Current Starved Voltage Controlled Oscillator); low area; low phase noise, PLL (Phase locked loop).- Star-Hurewicz Modulo an Ideal Property In Topological Spaces
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Authors
Affiliations
1 Department of Mathematics, University of Delhi, New Delhi-110007, IN
2 Department of Mathematics, Atmaram Sanatan Dharma College, University of Delhi, New Delhi, IN
1 Department of Mathematics, University of Delhi, New Delhi-110007, IN
2 Department of Mathematics, Atmaram Sanatan Dharma College, University of Delhi, New Delhi, IN
Source
The Journal of the Indian Mathematical Society, Vol 88, No 1-2 (2021), Pagination: 33–45Abstract
In this paper, a class of star-Hurewicz modulo an ideal spaces is introduced and studied. For an ideal K of finite subsets of N, a characterization of weakly star-K-Hurewicz extremally disconnected spaces is given using ideal. It is shown that star-Hurewicz modulo an ideal property is hereditary under clopen subspaces. In this manner we obtained relationships of star-Hurewicz modulo an ideal property with other existing Hurewicz properties in literature.Keywords
Hurewicz space, Stone-´Cech compactification, star-Hurewicz modulo an ideal, extremal disconnectedness, star-Hurewicz, Alexandroff duplicateReferences
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- On Star-σ-Countably Compact Spaces
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Authors
Affiliations
1 Department of Mathematics, Dyal Singh College, University of Delhi, New Delhi-110003, IN
1 Department of Mathematics, Dyal Singh College, University of Delhi, New Delhi-110003, IN
Source
The Journal of the Indian Mathematical Society, Vol 90, No 1-2 (2023), Pagination: 105-113Abstract
A space X is said to be star-σ-countably compact if for every open cover U of X, there exists a σ-countably compact subset C of X such that St(C, U) = X. In this paper, we investigate the relationship between star-σ-countably compact spaces and other related spaces and also study the topological properties of star-σ-countably compact spaces.Keywords
Compact, Starcompact, σ-Countably Compact, Lindel¨of, Covering, Star-Covering, Topological Space.References
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