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Anand, S.
- Simulated Annealing Algorithm for Modern VLSI Floorplanning Problem
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1 Department of Electronics and Communication Engineering, V V College of Engineering, IN
2 Department of Electrical and Electronics Engineering, V V College of Engineering, IN
1 Department of Electronics and Communication Engineering, V V College of Engineering, IN
2 Department of Electrical and Electronics Engineering, V V College of Engineering, IN
Source
ICTACT Journal on Microelectronics, Vol 2, No 1 (2016), Pagination: 175-181Abstract
In floorplanning, our aim is to determine the relative locations of the blocks in the chip and the objective is to minimize the floorplan area, wirelength. Generally, there are so many strategies in VLSI floorplanning like area optimization, wirelength optimization, power optimization, temperature optimization and etc. This paper concentrates on area optimization. The goal of the physical design process is to design the VLSI chip with minimum area. The primary idea is to minimize the floorplan area by reshaping the blocks which are present inside the floorplan in order to attain the minimum area with less computational time. Proposed problem is redefined with an efficient meta-heuristic as Simulated Annealing algorithm which will provide optimal solution with less computation time. The proposed algorithm has been tested by using set of benchmarks of Microelectronics Centre of North Carolina (MCNC).The performance of the proposed algorithm is compared with other stochastic algorithms reported in the literature and is found to be efficient in producing floorplan with minimal area. The performance of the proposed algorithm seems to be better than the existing algorithms.Keywords
VLSI, Floorplanning, Optimization, Deadspace, Meta-Heuristic, Simulated Annealing.- An Efficient and Effective Technique for Marker Detection and Pose Estimation using a Monocular Calibrated Camera
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Authors
Affiliations
1 Department of Electronics and Communication Engineering, Mar Baselios College of Engineering and Technology, IN
1 Department of Electronics and Communication Engineering, Mar Baselios College of Engineering and Technology, IN
Source
ICTACT Journal on Image and Video Processing, Vol 9, No 4 (2019), Pagination: 1981-1985Abstract
The basic idea of all image processing methods is to process images captures by the camera device. Using image processing techniques, it is possible to find and process markers, faces, natural objects, simple shapes and other objects. One of the techniques is based on the use of markers, both artificial and natural. Markers on image are used for determining objects around or about the current location of the user. This method is also known as marker-based tracking. Markers in this method can provide a reference coordinate system for producing graphical overlays over the real components on the images. Marker identification is an important part of marker-based tracking process. A good marker is considered to be a marker that can be easily and reliably detected under different circumstances. The process of marker detection consists of two stages: Image pre-processing and Identification of potential markers. Marker processing algorithm and steps related to image processing and detection of potential marker stages are: Acquisition of a source image, Image pre-processing and Detection of potential markers. This paper discusses a simple marker detection algorithm and its simulation in MATLAB for verification. A potential application of marker detection to estimate the pose of the marker in real time is also implemented and the results are discussed.Keywords
Marker, Processing, Detection, Tracking, Matlab.References
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