Informatics Publishing Limited

Abstract

The ever growing Semiconductor industry is turning today towards high-κ gate dielectrics in transistor manufacturing processes to meet the need for higher speed transistors while keeping power consumption under control. The thickness of silicon dioxide (SiO2) is very less so it produces the tunneling current leakage, high power consumption and produces high heat when scaling of the transistor. A technique has been developed to fabricate a Thin Film Transistors (TFT) using stacked high- κ nanomaterials. Here in this work using stacked ZrO2 and Al2O3 as high-κ dielectric nanomaterials, ITO/PET substrate which is flexible, and ZnO as a semiconducting layer provides high performance to the device. Through this proposed approach the above problems are solved and the transistor could be shrunk below 32 nm.

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