Informatics Publishing Limited

K. Thyagarajah ¹, A. Narendra Kumar ², J. Irrai Anbu ³

Affiliations
1 KSR College of Technology, Tiruchengode, TN, IN
2 PSNA College of Engineeering and Technology PSNACET, TN, IN
3 International Association of Computer Science and Information Technology IACSIT, IN

Abstract

This paper presents a clustering routing protocol for event- driven WSNs with Reduction of Reporting node in eachcluster. We demonstrate that decreasing the number of reporting nodes in each cluster; increase the number of reports that need to be sent to the sink in order to achieve the energy efficient and desired information reliability. The algorithm also aims at even energy dissipation among the nodes in the network by alternating the possible routes to the Sink and autonomous selection of energy efficient cluster head. This helps to balance the load on sensor nodes while avoiding congested links at the same time. Moreover, the algorithm proposes using an energy efficient approach by choosing high energy values of a node stored in buffer table for each round. We discuss the implementation of ourprotocol, and present its performance evaluation through NS2.

Keywords

Wireless Sensor Networks, Cluster, Energy Efficiency, Fault Tolerance.

Full Text

     

M. Augusta Angel ¹, A. Narendra Kumar ¹

Affiliations
1 Department of Electronics and Communication Engineering, V V College of Engineering, IN

Abstract

Over the past few decades, the intense growth of portable communication devices has led to stringent need of efficient system performance. The system performance is upgraded by reducing the computation time using the Residue Number System. Since, it performs the complex computation efficiently. In this paper, the modified prefix adders are proposed to perform the fast modulo computations and make use of the available resources. The projected modulo adders computes the complex modulo operations in reverse conversion process of RNS independently and in parallel without carry propagation. This results in better performance than the other typical adder components in terms of area and delay.

Keywords

Residue Number System, Reverse Converter, Prefix Adders, Computations.

Full Text