| Issue | Title | |
| Vol 6, No 8 (2014) | 128 Bit High Speed Manchester Carry Chain Adder Implemented Using 22nm Strained Silicon Technology with a Supply Voltage of 0.8V | Abstract |
| J. Ajayan, S. Shriram, D. Nirmal, K. Vivek | ||
| Vol 4, No 16 (2012) | 2D Ultrasonic Anemometer with Dynamic Temperature Compensation | Abstract |
| R. Vageeswar, A. Monish Kumar, B. Savithra, J. Lincy, S. Bhargavi | ||
| Vol 7, No 10 (2015) | 3 Channel Remote Controlled Micro Air Vehicle with a Spycam | Abstract |
| Suhas Divakar | ||
| Vol 4, No 12 (2012) | 3-Phase Input Power Factor Correction for Reduced Switch Converter | Abstract |
| T. Deenadhayalan, V. Arun | ||
| Vol 10, No 2 (2018) | 5-Level Cascaded Multilevel Inverter with Reduced Number Switches | Abstract |
| C. Geethaa, P. Prem | ||
| Vol 8, No 4 (2016) | A Proposed Mechanism for Energy Efficient Load Balancing Technique in Green Computing | Abstract |
| I. Sandhiya, D. Jayakumar | ||
| Vol 9, No 5 (2017) | A 30nW Sub-Threshold Adiabatic Carry Look-Ahead Adder in 90nm CMOS | Abstract |
| S. Saraswathi, G. K. V. N. Sharada | ||
| Vol 3, No 3 (2011) | A 657 mV, 43μW, Second Order CMOS Bandgap Reference on Chip | Abstract |
| Madan Mali, Mukul Sutaone, Amruta Kulkarni, Mangesh Bhalerao | ||
| Vol 8, No 3 (2016) | A 6.7mW 8-Bit Power Optimzed Sigma-Delta ADC as DUT for Built-in-Self-Test in 45nm CMOS | Abstract |
| Anil Kumar Sahu, Vivek Kumar Chandra, G R Sinha | ||
| Vol 8, No 6 (2016) | A 90nm Low Noise Amplifier Using Active Inductor for Ultra Wideband Application | Abstract |
| Mileshwar Sinha, Khemraj Deshmukh | ||
| Vol 9, No 4 (2017) | A Case Study on Various Clock Routing Algorithms | Abstract |
| Abhishek Parekh, Shreyas Charola | ||
| Vol 10, No 7 (2018) | A Closed Form Expression for Low Power Voltage Using Power Gating CCMOS (Clocked CMOS) D Flip Flop | Abstract |
| N. Bharathi, P. Divya, M. Jayasurya, A. Udhayakumar | ||
| Vol 8, No 4 (2016) | A Code Width Built In Self-Test Circuit for Eight Bit Sigma Delta ADC | Abstract |
| Yogita, Anil Kumar Sahu | ||
| Vol 3, No 12 (2011) | A Combined Technique for Static Power Reduction CMOS VLSI Circuits | Abstract |
| M. Janaki Rani, S. Malarkkan | ||
| Vol 7, No 3 (2015) | A Comparative Study and Simulation of Two Input DC-DC Converters Using MATLAB/Simulink | Abstract |
| A. Thiyagarajan, K. Sivakumar | ||
| Vol 2, No 2 (2010) | A Comparative Study of PI and Fuzzy Based Controllers for DC-DC Converters | Abstract |
| K. Deepa, R. Jeyanthi, K. S. Amitkumar | ||
| Vol 1, No 3 (2009) | A Complete Study of Low Power Register File Using Adiabatic Complementary Pass-transistor Logic | Abstract |
| D. Sreenu, A. K. Saxena, S. Dasgupta | ||
| Vol 9, No 1 (2017) | A Comprehensive Survey on Intrusion and Fraud Detection in Data Mining | Abstract |
| A. Shivyaa, P. J. Yuvadharshini | ||
| Vol 3, No 13 (2011) | A Critical Survey on Music Emotion Recognition Techniques for Music Information Retrieval | Abstract |
| S. Janani, K. Iyswarya, L. Maria Michael Visuwasam | ||
| Vol 10, No 2 (2018) | A Design of Energy Efficient Lighting by Using T5 Technology | Abstract |
| A. Karthika, V. Raghu Priyan, A. Manikandan, A. Rajkumar, B. Arun Prasad | ||
| Vol 7, No 8 (2015) | A Discrete-Time SIQR Epidemic Model with Non Linear Incidence Rate | Abstract |
| S. Elizabeth, Priyanka Victor | ||
| Vol 11, No 2 (2019) | A Embedded Based Human Protection against Electric Shock | Abstract |
| G. Vishnupraba, S. Chandru, S. Gunasekaran, A. Pravin raja, G. Vishnu | ||
| Vol 5, No 4 (2013) | A Fast Computation on Flipping Structure of VLSI Architecture for 2d-Discrete Wavelet Transforms | Abstract |
| Lenin Raja, A. Merline | ||
| Vol 1, No 3 (2009) | A High CMRR Front End Design with AC Coupling for QRS Detection | Abstract |
| D. Nithya, S. Ravindrakumar | ||
| Vol 4, No 9 (2012) | A High Performance Controlled AC-DC Converter Using Single Phase Matrix Converter | Abstract |
| G. Aarthi, T. Porselvi | ||
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